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15 | 15 | #include <linker/sections.h> |
16 | 16 | #include <devicetree.h> |
17 | 17 |
|
| 18 | +#include <linker/devicetree_regions.h> |
18 | 19 | #include <linker/linker-defs.h> |
19 | 20 | #include <linker/linker-tool.h> |
20 | 21 |
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|
66 | 67 | #define RAM_ADDR CONFIG_SRAM_BASE_ADDRESS |
67 | 68 | #endif |
68 | 69 |
|
69 | | -#if DT_NODE_HAS_STATUS(DT_CHOSEN(zephyr_ccm), okay) |
70 | | -#define CCM_SIZE DT_REG_SIZE(DT_CHOSEN(zephyr_ccm)) |
71 | | -#define CCM_ADDR DT_REG_ADDR(DT_CHOSEN(zephyr_ccm)) |
72 | | -#endif |
73 | | - |
74 | | -#if DT_NODE_HAS_STATUS(DT_CHOSEN(zephyr_itcm), okay) |
75 | | -#define ITCM_SIZE DT_REG_SIZE(DT_CHOSEN(zephyr_itcm)) |
76 | | -#define ITCM_ADDR DT_REG_ADDR(DT_CHOSEN(zephyr_itcm)) |
77 | | -#endif |
78 | | - |
79 | | -#if DT_NODE_HAS_STATUS(DT_CHOSEN(zephyr_dtcm), okay) |
80 | | -#define DTCM_SIZE DT_REG_SIZE(DT_CHOSEN(zephyr_dtcm)) |
81 | | -#define DTCM_ADDR DT_REG_ADDR(DT_CHOSEN(zephyr_dtcm)) |
82 | | -#endif |
83 | | - |
84 | 70 | #if defined(CONFIG_CUSTOM_SECTION_ALIGN) |
85 | 71 | _region_min_align = CONFIG_CUSTOM_SECTION_MIN_ALIGN_SIZE; |
86 | 72 | #else |
@@ -109,32 +95,21 @@ MEMORY |
109 | 95 | FLASH (rx) : ORIGIN = ROM_ADDR, LENGTH = ROM_SIZE |
110 | 96 | #ifdef CONFIG_HAS_TI_CCFG |
111 | 97 | FLASH_CCFG (rwx): ORIGIN = CCFG_ADDR, LENGTH = CCFG_SIZE |
112 | | -#endif |
113 | | -#if DT_NODE_HAS_STATUS(DT_CHOSEN(zephyr_ccm), okay) |
114 | | - CCM (rw) : ORIGIN = CCM_ADDR, LENGTH = CCM_SIZE |
115 | | -#endif |
116 | | -#if DT_NODE_HAS_STATUS(DT_CHOSEN(zephyr_itcm), okay) |
117 | | - ITCM (rw) : ORIGIN = ITCM_ADDR, LENGTH = ITCM_SIZE |
118 | | -#endif |
119 | | -#if DT_NODE_HAS_STATUS(DT_CHOSEN(zephyr_dtcm), okay) |
120 | | - DTCM (rw) : ORIGIN = DTCM_ADDR, LENGTH = DTCM_SIZE |
121 | 98 | #endif |
122 | 99 | SRAM (wx) : ORIGIN = RAM_ADDR, LENGTH = RAM_SIZE |
| 100 | + /* Data & Instruction Tightly Coupled Memory */ |
| 101 | + DT_REGION_FROM_NODE_STATUS_OKAY(ITCM, rw, DT_CHOSEN(zephyr_itcm)) |
| 102 | + DT_REGION_FROM_NODE_STATUS_OKAY(DTCM, rw, DT_CHOSEN(zephyr_dtcm)) |
| 103 | + /* STM32 Core Coupled Memory */ |
| 104 | + DT_REGION_FROM_NODE_STATUS_OKAY(CCM, rw, DT_CHOSEN(zephyr_ccm)) |
123 | 105 | #ifdef CONFIG_BT_STM32_IPM |
124 | 106 | SRAM1 (rw) : ORIGIN = RAM1_ADDR, LENGTH = RAM1_SIZE |
125 | 107 | SRAM2 (rw) : ORIGIN = RAM2_ADDR, LENGTH = RAM2_SIZE |
126 | 108 | #endif |
127 | | -#ifdef CONFIG_MEMC_STM32_SDRAM |
128 | | -#if DT_NODE_HAS_STATUS(DT_NODELABEL(sdram1), okay) |
129 | | - SDRAM1 (rw) : ORIGIN = DT_REG_ADDR(DT_NODELABEL(sdram1)), LENGTH = DT_REG_SIZE(DT_NODELABEL(sdram1)) |
130 | | -#endif |
131 | | -#if DT_NODE_HAS_STATUS(DT_NODELABEL(sdram2), okay) |
132 | | - SDRAM2 (rw) : ORIGIN = DT_REG_ADDR(DT_NODELABEL(sdram2)), LENGTH = DT_REG_SIZE(DT_NODELABEL(sdram2)) |
133 | | -#endif |
134 | | -#endif |
135 | | -#ifdef CONFIG_STM32_BACKUP_SRAM |
136 | | - BACKUP_SRAM (rw) : ORIGIN = DT_REG_ADDR(DT_NODELABEL(backup_sram)), LENGTH = DT_REG_SIZE(DT_NODELABEL(backup_sram)) |
137 | | -#endif |
| 109 | + /* STM32 alternate RAM configurations */ |
| 110 | + DT_REGION_FROM_NODE_STATUS_OKAY(SDRAM1, rw, DT_NODELABEL(sdram1)) |
| 111 | + DT_REGION_FROM_NODE_STATUS_OKAY(SDRAM2, rw, DT_NODELABEL(sdram2)) |
| 112 | + DT_REGION_FROM_NODE_STATUS_OKAY(BACKUP_SRAM, rw, DT_NODELABEL(backup_sram)) |
138 | 113 | /* Used by and documented in include/linker/intlist.ld */ |
139 | 114 | IDT_LIST (wx) : ORIGIN = (RAM_ADDR + RAM_SIZE), LENGTH = 2K |
140 | 115 | } |
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