boards: st: nucleo_n657x0_q: Add ethernet node

Add ethernet node

Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <[email protected]>

Author: marwaiehm-st

boards/st/nucleo_n657x0_q/Kconfig.defconfig

@@ -0,0 +1,15 @@
+# STM32N657X0_Q Nucleo board configuration
+
+# Copyright (c) 2025 STMicroelectronics
+# SPDX-License-Identifier: Apache-2.0
+
+if BOARD_NUCLEO_N657X0_Q
+
+if NETWORKING
+
+config NET_L2_ETHERNET
+	default y
+
+endif # NETWORKING
+
+endif # BOARD_NUCLEO_N657X0_Q

boards/st/nucleo_n657x0_q/doc/index.rst

@@ -76,6 +76,8 @@ The Zephyr ``nucleo_n657x0_q`` board supports the following hardware features:
 | UART      | on-chip    | serial port-polling;                |
 |           |            | serial port-interrupt               |
 +-----------+------------+-------------------------------------+
+| ETHERNET  | on-chip    | ethernet                            |
++-----------+------------+-------------------------------------+
 
 
 Other hardware features are not yet supported on this Zephyr port.

boards/st/nucleo_n657x0_q/nucleo_n657x0_q_common.dtsi

@@ -118,3 +118,27 @@
 	current-speed = <115200>;
 	status = "okay";
 };
+
+&mac {
+	status = "okay";
+	pinctrl-0 = <&eth1_rmii_ref_clk_pf7
+		     &eth1_rmii_crs_dv_pf10
+		     &eth1_rmii_rxd0_pf14
+		     &eth1_rmii_rxd1_pf15
+		     &eth1_rmii_tx_en_pf11
+		     &eth1_rmii_txd0_pf12
+		     &eth1_rmii_txd1_pf13>;
+	pinctrl-names = "default";
+};
+
+&mdio {
+	status = "okay";
+	pinctrl-0 = <&eth1_mdio_pf4 &eth1_mdc_pg11>;
+	pinctrl-names = "default";
+
+	ethernet-phy@0 {
+		compatible = "ethernet-phy";
+		reg = <0x0>;
+		status = "okay";
+	};
+};