drivers: espi: npcx: update the arbitration for eSPI TAF access

This commit adds the arbitration when EC and eSPI TAF access flash
simultaneously.

Signed-off-by: Tom Chang <[email protected]>

Author: TomChang19

drivers/espi/Kconfig.npcx

@@ -98,6 +98,14 @@ config ESPI_TAF_NPCX_RPMC_SUPPORT
 	help
 	  This option enable the handler for eSPI TAF RPMC request.
 
+config ESPI_TAF_NPCX_STS_AWAIT_TIMEOUT
+	int "A timeout value in microseconds to wait for automatic read status"
+	depends on ESPI_TAF_NPCX
+	default 20000
+	help
+	  This option specifies the timeout value in microseconds (us) for checking
+	  automatic read status.
+
 # The default value 'y' for the existing options if ESPI_NPCX is selected.
 if ESPI_NPCX
 

drivers/espi/espi_taf_npcx.c

@@ -666,6 +666,38 @@ static void espi_taf_event_handler(const struct device *dev, struct espi_callbac
 	k_work_submit(&npcx_espi_taf_data.work);
 }
 
+int espi_taf_npcx_block(const struct device *dev, bool en_block)
+{
+	struct espi_reg *const inst = HAL_INSTANCE(dev);
+
+	if (!IS_BIT_SET(inst->FLASHCTL, NPCX_FLASHCTL_SAF_AUTO_READ)) {
+		return 0;
+	}
+
+	if (en_block) {
+		if (WAIT_FOR(!IS_BIT_SET(inst->ESPISTS, NPCX_ESPISTS_FLAUTORDREQ),
+			     CONFIG_ESPI_TAF_NPCX_STS_AWAIT_TIMEOUT, NULL) == false) {
+			LOG_ERR("Check Automatic Read Queue Empty Timeout");
+			return -ETIMEDOUT;
+		}
+
+		inst->FLASHCTL |= BIT(NPCX_FLASHCTL_AUTO_RD_DIS_CTL);
+
+		if (WAIT_FOR(IS_BIT_SET(inst->ESPISTS, NPCX_ESPISTS_AUTO_RD_DIS_STS),
+			     CONFIG_ESPI_TAF_NPCX_STS_AWAIT_TIMEOUT, NULL) == false) {
+			inst->FLASHCTL &= ~BIT(NPCX_FLASHCTL_AUTO_RD_DIS_CTL);
+			inst->ESPISTS |= BIT(NPCX_ESPISTS_AUTO_RD_DIS_STS);
+			LOG_ERR("Check Automatic Read Disable Timeout");
+			return -ETIMEDOUT;
+		}
+	} else {
+		inst->FLASHCTL &= ~BIT(NPCX_FLASHCTL_AUTO_RD_DIS_CTL);
+		inst->ESPISTS |= BIT(NPCX_ESPISTS_AUTO_RD_DIS_STS);
+	}
+
+	return 0;
+}
+
 int npcx_init_taf(const struct device *dev, sys_slist_t *callbacks)
 {
 	espi_init_callback(&espi_taf_cb, espi_taf_event_handler, ESPI_BUS_TAF_NOTIFICATION);

soc/nuvoton/npcx/common/reg/reg_def.h

@@ -753,6 +753,7 @@ struct espi_reg {
 #define NPCX_ESPISTS_VWUPD               8
 #define NPCX_ESPISTS_ESPIRST             9
 #define NPCX_ESPISTS_PLTRST              10
+#define NPCX_ESPISTS_FLAUTORDREQ         14
 #define NPCX_ESPISTS_AMERR               15
 #define NPCX_ESPISTS_AMDONE              16
 #define NPCX_ESPISTS_VWUPDW              17
@@ -762,6 +763,7 @@ struct espi_reg {
 #define NPCX_ESPISTS_BMBURSTERR          22
 #define NPCX_ESPISTS_BMBURSTDONE         23
 #define NPCX_ESPISTS_ESPIRST_LVL         24
+#define NPCX_ESPISTS_AUTO_RD_DIS_STS     29
 #define NPCX_VWSWIRQ_IRQ_NUM             FIELD(0, 7)
 #define NPCX_VWSWIRQ_IRQ_LVL             7
 #define NPCX_VWSWIRQ_INDEX               FIELD(8, 7)

soc/nuvoton/npcx/common/soc_espi_taf.h

@@ -151,6 +151,8 @@ struct npcx_taf_head {
 
 int npcx_init_taf(const struct device *dev, sys_slist_t *callbacks);
 
+int espi_taf_npcx_block(const struct device *dev, bool en_block);
+
 #ifdef __cplusplus
 }
 #endif