drivers: flash: stm32h7: add support for write protection

Add support for setting flash write protection per sector for STM32H7x
chips.

Signed-off-by: Dawid Niedzwiecki <[email protected]>

Author: niedzwiecki-dawid

drivers/flash/Kconfig.stm32

@@ -33,7 +33,7 @@ if SOC_FLASH_STM32
 
 config FLASH_STM32_WRITE_PROTECT
 	bool "Extended operation for flash write protection control"
-	depends on SOC_SERIES_STM32F4X
+	depends on SOC_SERIES_STM32F4X || SOC_SERIES_STM32H7X
 	select FLASH_HAS_EX_OP
 	default n
 	help

drivers/flash/flash_stm32h7x.c

@@ -55,6 +55,9 @@ LOG_MODULE_REGISTER(LOG_DOMAIN);
  * the serie, there is a discontinuty between bank1 and bank2.
  */
 #define DISCONTINUOUS_BANKS         (REAL_FLASH_SIZE_KB < STM32H7_SERIES_MAX_FLASH_KB)
+#define NUMBER_OF_BANKS             2
+#else
+#define NUMBER_OF_BANKS             1
 #endif
 
 struct flash_stm32_sector_t {
@@ -129,6 +132,25 @@ static __unused int write_optsr(const struct device *dev, uint32_t mask, uint32_
 	return write_opt(dev, mask, value, cur, true);
 }
 
+static __unused int write_optwp(const struct device *dev, uint32_t mask, uint32_t value,
+				 uint32_t bank)
+{
+	FLASH_TypeDef *regs = FLASH_STM32_REGS(dev);
+	uintptr_t cur = (uintptr_t)regs + offsetof(FLASH_TypeDef, WPSN_CUR1);
+
+	if (bank >= NUMBER_OF_BANKS) {
+		return -EINVAL;
+	}
+
+#ifdef DUAL_BANK
+	if (bank == 1) {
+		cur = (uintptr_t)regs + offsetof(FLASH_TypeDef, WPSN_CUR2);
+	}
+#endif /* DUAL_BANK */
+
+	return write_opt(dev, mask, value, cur, false);
+}
+
 #if defined(CONFIG_FLASH_STM32_READOUT_PROTECTION)
 uint8_t flash_stm32_get_rdp_level(const struct device *dev)
 {
@@ -143,6 +165,83 @@ void flash_stm32_set_rdp_level(const struct device *dev, uint8_t level)
 }
 #endif /* CONFIG_FLASH_STM32_READOUT_PROTECTION */
 
+#if defined(CONFIG_FLASH_STM32_WRITE_PROTECT)
+
+#define WP_MSK FLASH_WPSN_WRPSN_Msk
+#define WP_POS FLASH_WPSN_WRPSN_Pos
+
+int flash_stm32_update_wp_sectors(const struct device *dev, uint64_t changed_sectors,
+				  uint64_t protected_sectors)
+{
+	/* All banks share the same sector mask. */
+	const uint64_t bank_mask = WP_MSK >> WP_POS;
+	const uint32_t sectors_per_bank = __builtin_popcount(WP_MSK);
+	uint64_t sectors_mask = 0;
+	uint32_t protected_sectors_reg;
+	uint32_t changed_sectors_reg;
+	int ret, ret2 = 0;
+	bool commit = false;
+
+	for (int i = 0; i < NUMBER_OF_BANKS; i++) {
+		sectors_mask |= bank_mask << (sectors_per_bank * i);
+	}
+
+	if ((changed_sectors & sectors_mask) != changed_sectors) {
+		return -EINVAL;
+	}
+
+	for (int i = 0; i < NUMBER_OF_BANKS; i++) {
+		/* Prepare protected and changed masks per bank. */
+		protected_sectors_reg = (protected_sectors >> sectors_per_bank * i) & bank_mask;
+		changed_sectors_reg = (changed_sectors >> sectors_per_bank * i) & bank_mask;
+
+		if (changed_sectors_reg == 0) {
+			continue;
+		}
+		changed_sectors_reg <<= WP_POS;
+		protected_sectors_reg <<= WP_POS;
+		/* Sector is protected when bit == 0. Flip protected_sectors bits */
+		protected_sectors_reg = ~protected_sectors_reg;
+
+		ret = write_optwp(dev, changed_sectors_reg, protected_sectors_reg, i);
+		/* Option byte was successfully changed if the return value is greater than 0. */
+		if (ret > 0) {
+			commit = true;
+		} else if (ret < 0) {
+			/* Do not continue changing WP on error. */
+			ret2 = ret;
+			break;
+		}
+	}
+
+	if (commit) {
+		ret = commit_optb(dev);
+		/* Make sure to return the first error. */
+		if (ret < 0 && ret2 == 0) {
+			ret2 = ret;
+		}
+	}
+
+	return ret2;
+}
+
+int flash_stm32_get_wp_sectors(const struct device *dev, uint64_t *protected_sectors)
+{
+	FLASH_TypeDef *regs = FLASH_STM32_REGS(dev);
+
+	*protected_sectors = (~regs->WPSN_CUR1 & WP_MSK) >> WP_POS;
+#ifdef DUAL_BANK
+	/* Available only for STM32H7x */
+	uint64_t proctected_sectors_2 =
+		(~regs->WPSN_CUR2 & WP_MSK) >> WP_POS;
+	const uint32_t sectors_per_bank = __builtin_popcount(WP_MSK);
+	*protected_sectors |= proctected_sectors_2 << sectors_per_bank;
+#endif /* DUAL_BANK */
+
+	return 0;
+}
+#endif /* CONFIG_FLASH_STM32_WRITE_PROTECT */
+
 int flash_stm32_option_bytes_lock(const struct device *dev, bool enable)
 {
 	FLASH_TypeDef *regs = FLASH_STM32_REGS(dev);

tests/drivers/flash/stm32/boards/google_icetower.overlay

@@ -0,0 +1,19 @@
+/*
+ * Copyright (c) 2024 Google Inc
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+&flash0 {
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		/* Reserve 4KiB of flash for storage_partition. */
+		storage_partition: partition@1f000 {
+			label = "storage";
+			reg = <0x0001f000 DT_SIZE_K(4)>;
+		};
+	};
+};

tests/drivers/flash/stm32/prj.conf

@@ -5,3 +5,4 @@ CONFIG_FLASH=y
 CONFIG_FLASH_EX_OP_ENABLED=y
 
 CONFIG_MAIN_STACK_SIZE=2048
+CONFIG_ZTEST_STACK_SIZE=2048

tests/drivers/flash/stm32/testcase.yaml

@@ -47,7 +47,10 @@ tests:
       - stm32h735g_disco
       - stm32h750b_dk
       - stm32h745i_disco/stm32h745xx/m7
+      - nucleo_h743zi
+      - google_icetower
     extra_configs:
       - CONFIG_FLASH_STM32_READOUT_PROTECTION=y
+      - CONFIG_FLASH_STM32_WRITE_PROTECT=y
     filter: dt_compat_enabled("st,stm32h7-flash-controller") and
       dt_label_with_parent_compat_enabled("storage_partition", "fixed-partitions")