drivers: can: mchp_mss: add control via KConfig of CAN_CONFIG.SWAP_ENDIAN bit

Default implementation of CAN driver for the Polarfire SoC inverts the byte ordering to write registers/from read registers due to platform endianness, possibly resulting in an unexpected behavior when considering the normal API usage of CAN. This adds KConfig support for
forcing a configuration bit to be set, which will take care of reversing
the byte order in hardware.

Signed-off-by: Donato Brusamento <[email protected]>

Author: DonBrus

drivers/can/Kconfig.mchp_mss

@@ -7,3 +7,18 @@ config CAN_MCHP_MSS
 	help
 	  This option enables the CAN driver for Microchip's PolarFire SoC
 	  platform.
+
+if CAN_MCHP_MSS
+
+config CAN_MCHP_MSS_SWAP_ENDIANNESS
+	bool "Force little endian on transmit and receive buffers"
+	help
+	  This option sets the SWAP_ENDIAN bit of CAN_CONFIG register.
+	  By setting this bit, the values of [TX|RX]_MSGx_DATA_[LOW|HIGH] 
+	  will operate in little endian mode. For example, either field set 
+	  to 0x01020304 will result in 0x01 -> 0x02 -> 0x03 -> 0x04 being written on the bus.
+
+	  Conversely, when operating in the (default) big endian mode, the inverse
+	  sequence will be transmitted on the bus, i.e. in network order.
+
+endif # CAN_MCHP_MSS

drivers/can/can_mchp_mss.c

@@ -259,6 +259,7 @@ static int mss_can_reset(const struct device *dev)
 {
 	const struct mss_can_config *cfg = dev->config;
 	uintptr_t reg_base = cfg->reg_base;
+	uint32_t can_config;
 
 #if MSS_CAN_RESET_ENABLED
 	if (cfg->reset_spec.dev != NULL) {
@@ -269,6 +270,14 @@ static int mss_can_reset(const struct device *dev)
 	mss_can_stop_and_disable_interrupts(reg_base);
 	BUILD_ASSERT(MSS_CAN_TX_MSG_COUNT == MSS_CAN_RX_MSG_COUNT);
 
+	can_config = sys_read32(reg_base + MSS_CAN_CONFIG);
+#if CONFIG_CAN_MCHP_MSS_SWAP_ENDIANNESS
+	can_config |= MSS_CAN_CFG_SWAP_ENDIAN;
+#else
+	can_config &= ~MSS_CAN_CFG_SWAP_ENDIAN;
+#endif
+	sys_write32(can_config, reg_base + MSS_CAN_CONFIG);
+
 	for (uintptr_t i = 0; i < MSS_CAN_TX_MSG_COUNT; ++i) {
 		/* Clear transmit buffer */
 		uintptr_t tx_msg_base = reg_base + MSS_CAN_TX_MSG(i);