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drivers: spi_nor: generalize support for ULBPR instruction
Replace the hard-coded check for JEDEC IDs with a property that must be set in the devicetree entry. Signed-off-by: Peter A. Bigot <[email protected]>
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3 files changed

+17
-6
lines changed

3 files changed

+17
-6
lines changed

drivers/flash/spi_nor.c

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -290,11 +290,11 @@ static int spi_nor_write_protection_set(struct device *dev, bool write_protect)
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ret = spi_nor_cmd_write(dev, (write_protect) ?
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SPI_NOR_CMD_WRDI : SPI_NOR_CMD_WREN);
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293-
#if DT_INST_0_JEDEC_SPI_NOR_JEDEC_ID_0 == 0xbf && DT_INST_0_JEDEC_SPI_NOR_JEDEC_ID_1 == 0x26
294-
if (ret == 0 && !write_protect) {
295-
ret = spi_nor_cmd_write(dev, SPI_NOR_CMD_MCHP_UNLOCK);
293+
if (IS_ENABLED(DT_INST_0_JEDEC_SPI_NOR_REQUIRES_ULBPR)
294+
&& (ret == 0)
295+
&& !write_protect) {
296+
ret = spi_nor_cmd_write(dev, SPI_NOR_CMD_ULBPR);
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}
297-
#endif
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SYNC_UNLOCK();
300300

drivers/flash/spi_nor.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -38,7 +38,7 @@ struct spi_nor_config {
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#define SPI_NOR_CMD_BE 0xD8 /* Block erase */
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#define SPI_NOR_CMD_CE 0xC7 /* Chip erase */
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#define SPI_NOR_CMD_RDID 0x9F /* Read JEDEC ID */
41-
#define SPI_NOR_CMD_MCHP_UNLOCK 0x98 /* Microchip: Global unblock */
41+
#define SPI_NOR_CMD_ULBPR 0x98 /* Global Block Protection Unlock */
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/* Page, sector, and block size are standard, not configurable. */
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#define SPI_NOR_PAGE_SIZE 0x0100U

dts/bindings/mtd/jedec,spi-nor.yaml

Lines changed: 12 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,18 @@ properties:
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has-be32k:
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type: boolean
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required: false
22-
description: Indicates the device supports the BE32K command
22+
description: Indicates the device supports the BE32K (0xD8) command
23+
24+
requires-ulbpr:
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type: boolean
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required: false
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description: |
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Indicates the device requires the ULBPR (0x98) command.
29+
30+
Some flash chips such as the Microchip SST26VF series have a block
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protection register that initializes to write-protected. Use this
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property to indicate that the BPR must be unlocked before write
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operations can proceed.
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size:
2536
type: int

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