soc: silabs: siwx91x: define hardware sys clock from dts

This patch introduce configuration of the symbol
'SYS_CLOCK_HW_CYCLES_PER_SEC' with dts entry rather than a hardcoded
value.
Clock control on siwx91x needs to use the clock frequency of the cpu
to init rather than the 'SYS_CLOCK_HW_CYCLES_PER_SEC' symbol,
otherwise we initialize the m4 clock with the ULP ref clock.

Signed-off-by: Martin Hoff <[email protected]>

Author: Martinhoff-maker

boards/silabs/dev_kits/siwx917_dk2605a/siwx917_dk2605a.dts

@@ -85,6 +85,10 @@
 	};
 };
 
+&cpu0 {
+	clock-frequency = <180000000>;
+};
+
 &ulpuart {
 	pinctrl-0 = <&ulpuart_default>;
 	pinctrl-names = "default";

boards/silabs/dev_kits/siwx917_dk2605a/siwx917_dk2605a_defconfig

@@ -1,7 +1,6 @@
 # Copyright (c) 2025 Silicon Laboratories Inc.
 # SPDX-License-Identifier: Apache-2.0
 
-CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=180000000
 CONFIG_USE_DT_CODE_PARTITION=y
 CONFIG_CONSOLE=y
 CONFIG_UART_CONSOLE=y

boards/silabs/radio_boards/siwx917_rb4338a/siwx917_rb4338a.dts

@@ -77,6 +77,10 @@
 	};
 };
 
+&cpu0 {
+	clock-frequency = <180000000>;
+};
+
 &ulpuart {
 	pinctrl-0 = <&ulpuart_default>;
 	pinctrl-names = "default";

boards/silabs/radio_boards/siwx917_rb4338a/siwx917_rb4338a_defconfig

@@ -1,7 +1,6 @@
 # Copyright (c) 2024 Silicon Laboratories Inc.
 # SPDX-License-Identifier: Apache-2.0
 
-CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=180000000
 CONFIG_USE_DT_CODE_PARTITION=y
 CONFIG_CONSOLE=y
 CONFIG_UART_CONSOLE=y

boards/silabs/radio_boards/siwx917_rb4342a/siwx917_rb4342a.dts

@@ -78,6 +78,10 @@
 	};
 };
 
+&cpu0 {
+	clock-frequency = <180000000>;
+};
+
 &ulpuart {
 	pinctrl-0 = <&ulpuart_default>;
 	pinctrl-names = "default";

boards/silabs/radio_boards/siwx917_rb4342a/siwx917_rb4342a_defconfig

@@ -1,7 +1,6 @@
 # Copyright (c) 2025 Silicon Laboratories Inc.
 # SPDX-License-Identifier: Apache-2.0
 
-CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=180000000
 CONFIG_USE_DT_CODE_PARTITION=y
 CONFIG_CONSOLE=y
 CONFIG_UART_CONSOLE=y

drivers/clock_control/clock_control_silabs_siwx91x.c

@@ -245,10 +245,12 @@ static int siwx91x_clock_init(const struct device *dev)
 	sl_si91x_clock_manager_init();
 
 	/* Use SoC PLL at configured frequency as core clock */
-	sl_si91x_clock_manager_m4_set_core_clk(M4_SOCPLLCLK, CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC);
+	sl_si91x_clock_manager_m4_set_core_clk(M4_SOCPLLCLK,
+					       DT_PROP(DT_PATH(cpus, cpu_0), clock_frequency));
 
 	/* Use interface PLL at configured frequency as peripheral clock */
-	sl_si91x_clock_manager_set_pll_freq(INFT_PLL, CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC,
+	sl_si91x_clock_manager_set_pll_freq(INFT_PLL,
+					    DT_PROP(DT_PATH(cpus, cpu_0), clock_frequency),
 					    PLL_REF_CLK_VAL_XTAL);
 
 	/* FIXME: Currently the clock consumer use clocks without power on them.

soc/silabs/silabs_siwx91x/Kconfig.defconfig

@@ -6,6 +6,10 @@ if SOC_FAMILY_SILABS_SIWX91X
 configdefault CORTEX_M_SYSTICK
 	default n if SILABS_SLEEPTIMER_TIMER
 
+configdefault SYS_CLOCK_HW_CYCLES_PER_SEC
+	default $(dt_node_int_prop_int,/cpus/cpu@0,clock-frequency) if CORTEX_M_SYSTICK
+	default 32768
+
 configdefault SYS_CLOCK_TICKS_PER_SEC
 	default 128 if !TICKLESS_KERNEL && SILABS_SLEEPTIMER_TIMER
 	default 1024 if SILABS_SLEEPTIMER_TIMER