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6 | 6 |
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7 | 7 | #include <arm/armv7-m.dtsi>
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8 | 8 | #include <zephyr/dt-bindings/clock/imx95_clock.h>
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| 9 | +#include <dt-bindings/i2c/i2c.h> |
9 | 10 | #include <mem.h>
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10 | 11 |
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11 | 12 | / {
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76 | 77 | reg = <0x20000000 DT_SIZE_K(256)>;
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77 | 78 | };
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78 | 79 |
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| 80 | + lpi2c3: i2c@42530000 { |
| 81 | + compatible = "nxp,imx-lpi2c"; |
| 82 | + clock-frequency = <I2C_BITRATE_STANDARD>; |
| 83 | + #address-cells = <1>; |
| 84 | + #size-cells = <0>; |
| 85 | + reg = <0x42530000 0x4000>; |
| 86 | + interrupts = <58 0>; |
| 87 | + clocks = <&scmi_clk IMX95_CLK_LPI2C3>; |
| 88 | + status = "disabled"; |
| 89 | + }; |
| 90 | + |
| 91 | + lpi2c4: i2c@42540000 { |
| 92 | + compatible = "nxp,imx-lpi2c"; |
| 93 | + clock-frequency = <I2C_BITRATE_STANDARD>; |
| 94 | + #address-cells = <1>; |
| 95 | + #size-cells = <0>; |
| 96 | + reg = <0x42540000 0x4000>; |
| 97 | + interrupts = <59 0>; |
| 98 | + clocks = <&scmi_clk IMX95_CLK_LPI2C4>; |
| 99 | + status = "disabled"; |
| 100 | + }; |
| 101 | + |
79 | 102 | lpuart3: serial@42570000 {
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80 | 103 | compatible = "nxp,imx-lpuart", "nxp,kinetis-lpuart";
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81 | 104 | reg = <0x42570000 DT_SIZE_K(64)>;
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124 | 147 | status = "disabled";
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125 | 148 | };
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126 | 149 |
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| 150 | + lpi2c5: i2c@426b0000 { |
| 151 | + compatible = "nxp,imx-lpi2c"; |
| 152 | + clock-frequency = <I2C_BITRATE_STANDARD>; |
| 153 | + #address-cells = <1>; |
| 154 | + #size-cells = <0>; |
| 155 | + reg = <0x426b0000 0x4000>; |
| 156 | + interrupts = <181 0>; |
| 157 | + clocks = <&scmi_clk IMX95_CLK_LPI2C5>; |
| 158 | + status = "disabled"; |
| 159 | + }; |
| 160 | + |
| 161 | + lpi2c6: i2c@426c0000 { |
| 162 | + compatible = "nxp,imx-lpi2c"; |
| 163 | + clock-frequency = <I2C_BITRATE_STANDARD>; |
| 164 | + #address-cells = <1>; |
| 165 | + #size-cells = <0>; |
| 166 | + reg = <0x426c0000 0x4000>; |
| 167 | + interrupts = <182 0>; |
| 168 | + clocks = <&scmi_clk IMX95_CLK_LPI2C6>; |
| 169 | + status = "disabled"; |
| 170 | + }; |
| 171 | + |
| 172 | + lpi2c7: i2c@426d0000 { |
| 173 | + compatible = "nxp,imx-lpi2c"; |
| 174 | + clock-frequency = <I2C_BITRATE_STANDARD>; |
| 175 | + #address-cells = <1>; |
| 176 | + #size-cells = <0>; |
| 177 | + reg = <0x426d0000 0x4000>; |
| 178 | + interrupts = <183 0>; |
| 179 | + clocks = <&scmi_clk IMX95_CLK_LPI2C7>; |
| 180 | + status = "disabled"; |
| 181 | + }; |
| 182 | + |
| 183 | + lpi2c8: i2c@426e0000 { |
| 184 | + compatible = "nxp,imx-lpi2c"; |
| 185 | + clock-frequency = <I2C_BITRATE_STANDARD>; |
| 186 | + #address-cells = <1>; |
| 187 | + #size-cells = <0>; |
| 188 | + reg = <0x426e0000 0x4000>; |
| 189 | + interrupts = <184 0>; |
| 190 | + clocks = <&scmi_clk IMX95_CLK_LPI2C8>; |
| 191 | + status = "disabled"; |
| 192 | + }; |
| 193 | + |
| 194 | + lpi2c1: i2c@44340000 { |
| 195 | + compatible = "nxp,imx-lpi2c"; |
| 196 | + clock-frequency = <I2C_BITRATE_STANDARD>; |
| 197 | + #address-cells = <1>; |
| 198 | + #size-cells = <0>; |
| 199 | + reg = <0x44340000 0x4000>; |
| 200 | + interrupts = <13 0>; |
| 201 | + clocks = <&scmi_clk IMX95_CLK_LPI2C1>; |
| 202 | + status = "disabled"; |
| 203 | + }; |
| 204 | + |
| 205 | + lpi2c2: i2c@44350000 { |
| 206 | + compatible = "nxp,imx-lpi2c"; |
| 207 | + clock-frequency = <I2C_BITRATE_STANDARD>; |
| 208 | + #address-cells = <1>; |
| 209 | + #size-cells = <0>; |
| 210 | + reg = <0x44350000 0x4000>; |
| 211 | + interrupts = <14 0>; |
| 212 | + clocks = <&scmi_clk IMX95_CLK_LPI2C2>; |
| 213 | + status = "disabled"; |
| 214 | + }; |
| 215 | + |
127 | 216 | lpuart1: serial@44380000 {
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128 | 217 | compatible = "nxp,imx-lpuart", "nxp,kinetis-lpuart";
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129 | 218 | reg = <0x44380000 DT_SIZE_K(64)>;
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