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Titan-Realtekkartben
Titan-Realtek
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kartben
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soc : realtek: ec: rts5912: add support ULPM
Port rts5912 ULPM on Zephyr Signed-off-by: Titan Chen <[email protected]>
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‎dts/arm/realtek/ec/rts5912.dtsi‎

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@@ -372,6 +372,45 @@
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&jtag_clk_gpio90 &jtag_tms_gpio91>;
373373
pinctrl-names = "default";
374374
};
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ulpm: ulpm {
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compatible = "realtek,rts5912-ulpm";
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wkup-pins-max = <6>; /* 6 system wake-up pins */
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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wkup-pin@0 {
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reg = <0x0>;
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wkup-pin-mode = "gpio";
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};
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wkup-pin@1 {
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reg = <0x1>;
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wkup-pin-mode = "gpio";
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};
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wkup-pin@2 {
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reg = <0x2>;
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wkup-pin-mode = "gpio";
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};
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wkup-pin@3 {
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reg = <0x3>;
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wkup-pin-mode = "gpio";
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};
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wkup-pin@4 {
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reg = <0x4>;
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wkup-pin-mode = "gpio";
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};
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wkup-pin@5 {
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reg = <0x5>;
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wkup-pin-mode = "gpio";
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};
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};
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};
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&nvic {

‎dts/bindings/power/realtek,rts5912-ulpm.yaml‎

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# Copyright (c) 2025 Realtek Semiconductor Corporation, SIBG-SD7
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# SPDX-License-Identifier: Apache-2.0
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description: RTS5912 ULPM power controller
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compatible: "realtek,rts5912-ulpm"
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include: base.yaml
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properties:
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wkup-pins-max:
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type: int
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description: |
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Max nbr of system wake-up pins.
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For example wkup-pins-nb = <5>; on the rts5912
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child-binding:
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description: |
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RTS5912 wake-up pin node.
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All nodes using this binding must be named "wkup-pin@[index]"
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index starts from 0
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properties:
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reg:
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type: array
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required: true
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description: Wake-up pin identifier, same as "index" in node name
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wkup-pin-pol:
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type: string
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default: rising
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description: indicates a wakeup polarity
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enum:
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- rising
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- falling
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wkup-pin-mode:
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type: string
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default: vin
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required: true
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description: indicates a wakeup pin mode selection
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enum:
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- vin
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- gpio

‎soc/realtek/ec/rts5912/CMakeLists.txt‎

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@@ -13,5 +13,7 @@ zephyr_sources_ifdef(CONFIG_PM
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)
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zephyr_sources_ifdef(CONFIG_RTS5912_DEBUG_SWJ debug_swj.c)
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zephyr_sources_ifdef(CONFIG_POWEROFF poweroff.c)
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zephyr_sources_ifdef(CONFIG_SOC_RTS5912_ULPM rts5912_ulpm.c)
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set(SOC_LINKER_SCRIPT ${ZEPHYR_BASE}/include/zephyr/arch/arm/cortex_m/scripts/linker.ld CACHE INTERNAL "")

‎soc/realtek/ec/rts5912/Kconfig‎

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@@ -29,4 +29,12 @@ config RTS5912_DEBUG_SWJ
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help
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Enables the serial wire JTAG connection on the RTS5912 EC.
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config SOC_RTS5912_ULPM
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bool "Realtek RTS5912 ULPM (Ultra Low Power Mode)"
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default y
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depends on DT_HAS_REALTEK_RTS5912_ULPM_ENABLED
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select HAS_POWEROFF
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help
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Enable support for RTS5912 ULPM PWR wake-up pins.
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endif # SOC_SERIES_RTS5912

‎soc/realtek/ec/rts5912/poweroff.c‎

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/*
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* Copyright (c) 2025 Realtek Semiconductor Corporation, SIBG-SD7
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/kernel.h>
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#include <zephyr/sys/poweroff.h>
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#include <zephyr/toolchain.h>
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#include "rts5912_ulpm.h"
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void z_sys_poweroff(void)
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{
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if (IS_ENABLED(CONFIG_SOC_RTS5912_ULPM)) {
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rts5912_ulpm_enable();
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/* Spin and wait for ULPM */
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while (1) {
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;
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}
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CODE_UNREACHABLE;
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}
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}

‎soc/realtek/ec/rts5912/reg/reg_system.h‎

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@@ -294,8 +294,8 @@ typedef struct {
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#define SYSTEM_VIVOCTRL_VIN2POL_Msk BIT(SYSTEM_VIVOCTRL_VIN2POL_Pos)
295295
#define SYSTEM_VIVOCTRL_VIN3POL_Pos (15UL)
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#define SYSTEM_VIVOCTRL_VIN3POL_Msk BIT(SYSTEM_VIVOCTRL_VIN3POL_Pos)
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#define SYSTEM_VIVOCTRL_VIN4POL_Pos (16UL)
298-
#define SYSTEM_VIVOCTRL_VIN4POL_Msk BIT(SYSTEM_VIVOCTRL_VIN4POL_Pos)
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#define SYSTEM_VIVOCTRL_VODEF_Pos (16UL)
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#define SYSTEM_VIVOCTRL_VODEF_Msk BIT(SYSTEM_VIVOCTRL_VODEF_Pos)
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#define SYSTEM_VIVOCTRL_VIN5POL_Pos (17UL)
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#define SYSTEM_VIVOCTRL_VIN5POL_Msk BIT(SYSTEM_VIVOCTRL_VIN5POL_Pos)
301301
#define SYSTEM_VIVOCTRL_REGWREN_Pos (30UL)
@@ -332,4 +332,6 @@ typedef struct {
332332
#define SYSTEM_PERICLKPWR2_RC32KSRC_Pos (30UL)
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#define SYSTEM_PERICLKPWR2_RC32KSRC_Msk GENMASK(31, 30)
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#define RTS5912_SCCON_REG_BASE ((SYSTEM_Type *)(DT_REG_ADDR(DT_NODELABEL(sccon))))
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#endif /* ZEPHYR_SOC_REALTEK_RTS5912_REG_SYSTEM_H */

‎soc/realtek/ec/rts5912/rts5912_ulpm.c‎

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/*
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* Copyright (c) 2025 Realtek Semiconductor Corporation, SIBG-SD7
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <zephyr/kernel.h>
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#include <zephyr/device.h>
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#include <zephyr/drivers/gpio.h>
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#include <zephyr/devicetree.h>
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#include "rts5912_ulpm.h"
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#include "reg/reg_system.h"
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#include "reg/reg_gpio.h"
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(ulpm, CONFIG_SOC_LOG_LEVEL);
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#define DT_DRV_COMPAT realtek_rts5912_ulpm
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BUILD_ASSERT(DT_NUM_INST_STATUS_OKAY(DT_DRV_COMPAT) <= 1, "Unsupported number of instances");
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#define RTS5912_ULPM_NODE DT_DRV_INST(0)
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#define ULPM_RTS5912_MAX_NB_WKUP_PINS DT_INST_PROP(0, wkup_pins_max)
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/** @cond INTERNAL_HIDDEN */
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/**
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* @brief flags for wake-up pin polarity configuration
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* @{
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*/
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enum wkup_pin_mode {
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RTS5912_ULPM_WKUP_PIN_MODE_VIN = 0,
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RTS5912_ULPM_WKUP_PIN_MODE_GPIO = 1,
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};
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enum wkup_pin_pol {
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/* detection of wake-up event on the high level : rising edge */
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RTS5912_ULPM_WKUP_PIN_POL_RISING = 0,
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/* detection of wake-up event on the low level : falling edge */
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RTS5912_ULPM_WKUP_PIN_POL_FALLING = 1,
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};
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/** @} */
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/**
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* @brief Structure for storing the devicetree configuration of a wake-up pin.
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*/
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struct wkup_pin_dt_cfg_t {
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/* starts from 0 */
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uint32_t wkup_pin_id;
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/* wake up polarity */
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enum wkup_pin_pol pin_pol;
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/* wake up pin mode, VIN / GPIO */
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enum wkup_pin_mode pin_mode;
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};
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/**
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* @brief Get wake-up pin configuration from a given devicetree node.
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*
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* This returns a static initializer for a <tt>struct wkup_pin_dt_cfg_t</tt>
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* filled with data from a given devicetree node.
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*
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* @param node_id Devicetree node identifier.
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*
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* @return Static initializer for a wkup_pin_dt_cfg_t structure.
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*/
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#define WKUP_PIN_CFG_DT(node_id) \
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{ \
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.wkup_pin_id = DT_REG_ADDR(node_id), \
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.pin_pol = (uint8_t)DT_ENUM_IDX(node_id, wkup_pin_pol), \
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.pin_mode = (uint8_t)DT_ENUM_IDX(node_id, wkup_pin_mode), \
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}
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/* wkup_pin idx starts from 0 */
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#define WKUP_PIN_CFG_DT_COMMA(wkup_pin_id) WKUP_PIN_CFG_DT(wkup_pin_id),
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/** @endcond */
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static struct wkup_pin_dt_cfg_t wkup_pins_cfgs[] = {
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DT_INST_FOREACH_CHILD(0, WKUP_PIN_CFG_DT_COMMA)};
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#define WKUP_PIN_SIZE ARRAY_SIZE(wkup_pins_cfgs)
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/**
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* @brief Enable VOUT function and set the VOUT default value.
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*/
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void ulpm_start(void)
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{
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SYSTEM_Type *sys_reg = RTS5912_SCCON_REG_BASE;
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/* enable VOUT */
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sys_reg->VIVOCTRL &= ~(SYSTEM_VIVOCTRL_VOUTMD_Msk);
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k_msleep(10);
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/* Set the VOUT to low */
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sys_reg->VIVOCTRL &= ~(SYSTEM_VIVOCTRL_VODEF_Msk);
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k_msleep(10);
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/* update to ULPM */
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sys_reg->VIVOCTRL |= SYSTEM_VIVOCTRL_REGWREN_Msk;
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k_msleep(10);
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}
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/**
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* @brief Update register value to ULPM IP
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*/
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void update_vivo_register(void)
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{
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SYSTEM_Type *sys_reg = RTS5912_SCCON_REG_BASE;
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/* Update Register & reset bit */
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k_msleep(10);
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sys_reg->VIVOCTRL |= SYSTEM_VIVOCTRL_REGWREN_Msk;
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k_msleep(10);
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sys_reg->VIVOCTRL &= ~(SYSTEM_VIVOCTRL_REGWREN_Msk);
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k_msleep(10);
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}
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/**
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* @brief Configure & enable a wake-up pin.
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*
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* @param wakeup_pin_cfg wake-up pin runtime configuration.
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*
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*/
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void rts5912_ulpm_enable(void)
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{
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SYSTEM_Type *sys_reg = RTS5912_SCCON_REG_BASE;
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int i, id;
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125+
LOG_INF("rts5912 ULPM enabled\n");
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/* VoutEnable, Keep VOUT output default value as bit 16 */
127+
sys_reg->VIVOCTRL |= SYSTEM_VIVOCTRL_VODEF_Msk;
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k_msleep(10);
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/* set to GPIO mode to clear status and aviod mis-trigger */
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sys_reg->VIVOCTRL |= (SYSTEM_VIVOCTRL_VIN0MD_Msk | SYSTEM_VIVOCTRL_VIN1MD_Msk |
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SYSTEM_VIVOCTRL_VIN2MD_Msk | SYSTEM_VIVOCTRL_VIN3MD_Msk |
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SYSTEM_VIVOCTRL_VIN4MD_Msk | SYSTEM_VIVOCTRL_VIN5MD_Msk);
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/* Update Status Bit to ULPM IP */
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update_vivo_register();
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/* Configure Mode (VIN/GPIO) and Edge (Falling/Rising) */
138+
for (i = 0; i < WKUP_PIN_SIZE; i++) {
139+
id = wkup_pins_cfgs[i].wkup_pin_id;
140+
/* corner case test */
141+
if ((id < 0) || (id >= ULPM_RTS5912_MAX_NB_WKUP_PINS)) {
142+
continue;
143+
}
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/* Configure Mode */
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if (wkup_pins_cfgs[i].pin_mode == RTS5912_ULPM_WKUP_PIN_MODE_VIN) {
147+
LOG_DBG("setup VIN%d in ", id);
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/* Configure Polarity */
149+
if (wkup_pins_cfgs[i].pin_pol == RTS5912_ULPM_WKUP_PIN_POL_RISING) {
150+
/* Falling Edge */
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sys_reg->VIVOCTRL |= BIT(SYSTEM_VIVOCTRL_VIN0POL_Pos + id);
152+
LOG_DBG("Falling Edge\n");
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} else {
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/* Rising Edge */
155+
sys_reg->VIVOCTRL &= ~BIT(SYSTEM_VIVOCTRL_VIN0POL_Pos + id);
156+
LOG_DBG("Rising Edge\n");
157+
}
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/* VIN Mode */
159+
sys_reg->VIVOCTRL &= ~BIT(SYSTEM_VIVOCTRL_VIN0MD_Pos + id);
160+
}
161+
}
162+
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/* Update Status Bit to ULPM IP */
164+
update_vivo_register();
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/* Disable LDO 2 power. */
167+
sys_reg->LDOCTRL &= ~(SYSTEM_LDOCTRL_LDO2EN_Msk);
168+
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/* ULPM Start */
170+
ulpm_start();
171+
}

‎soc/realtek/ec/rts5912/rts5912_ulpm.h‎

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/*
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* Copyright (c) 2025 Realtek Semiconductor Corporation, SIBG-SD7
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_SOC_REALTEK_RTS5912_ULPM_H_
8+
#define ZEPHYR_SOC_REALTEK_RTS5912_ULPM_H_
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#ifdef __cplusplus
11+
extern "C" {
12+
#endif
13+
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void rts5912_ulpm_enable(void);
15+
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#ifdef __cplusplus
17+
}
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#endif
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#endif /* ZEPHYR_SOC_REALTEK_RTS5912_ULPM_H_ */

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