|
46 | 46 | READ_STATUS, |
47 | 47 | WRITE_ENABLE, |
48 | 48 | ERASE_SECTOR, |
| 49 | + ERASE_BLOCK, |
49 | 50 | PAGE_PROGRAM_INPUT, |
50 | 51 | PAGE_PROGRAM_QUAD_INPUT, |
51 | 52 | READ_ID, |
@@ -91,6 +92,11 @@ static const uint32_t flash_flexspi_nor_lut[][4] = { |
91 | 92 | kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18), |
92 | 93 | }, |
93 | 94 |
|
| 95 | + [ERASE_BLOCK] = { |
| 96 | + FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, SPI_NOR_CMD_BE, |
| 97 | + kFLEXSPI_Command_RADDR_SDR, kFLEXSPI_1PAD, 0x18), |
| 98 | + }, |
| 99 | + |
94 | 100 | [ERASE_CHIP] = { |
95 | 101 | FLEXSPI_LUT_SEQ(kFLEXSPI_Command_SDR, kFLEXSPI_1PAD, SPI_NOR_CMD_CE, |
96 | 102 | kFLEXSPI_Command_STOP, kFLEXSPI_1PAD, 0), |
@@ -251,6 +257,26 @@ static int flash_flexspi_nor_erase_sector(const struct device *dev, |
251 | 257 | return memc_flexspi_transfer(data->controller, &transfer); |
252 | 258 | } |
253 | 259 |
|
| 260 | +static int flash_flexspi_nor_erase_block(const struct device *dev, |
| 261 | + off_t offset) |
| 262 | +{ |
| 263 | + struct flash_flexspi_nor_data *data = dev->data; |
| 264 | + |
| 265 | + flexspi_transfer_t transfer = { |
| 266 | + .deviceAddress = offset, |
| 267 | + .port = data->port, |
| 268 | + .cmdType = kFLEXSPI_Command, |
| 269 | + .SeqNumber = 1, |
| 270 | + .seqIndex = ERASE_BLOCK, |
| 271 | + .data = NULL, |
| 272 | + .dataSize = 0, |
| 273 | + }; |
| 274 | + |
| 275 | + LOG_DBG("Erasing block at 0x%08zx", (ssize_t) offset); |
| 276 | + |
| 277 | + return memc_flexspi_transfer(data->controller, &transfer); |
| 278 | +} |
| 279 | + |
254 | 280 | static int flash_flexspi_nor_erase_chip(const struct device *dev) |
255 | 281 | { |
256 | 282 | struct flash_flexspi_nor_data *data = dev->data; |
@@ -392,7 +418,9 @@ static int flash_flexspi_nor_erase(const struct device *dev, off_t offset, |
392 | 418 | size_t size) |
393 | 419 | { |
394 | 420 | struct flash_flexspi_nor_data *data = dev->data; |
395 | | - int num_sectors = size / SPI_NOR_SECTOR_SIZE; |
| 421 | + const size_t num_sectors = size / SPI_NOR_SECTOR_SIZE; |
| 422 | + const size_t num_blocks = size / SPI_NOR_BLOCK_SIZE; |
| 423 | + |
396 | 424 | int i; |
397 | 425 | unsigned int key = 0; |
398 | 426 |
|
@@ -424,6 +452,14 @@ static int flash_flexspi_nor_erase(const struct device *dev, off_t offset, |
424 | 452 | flash_flexspi_nor_erase_chip(dev); |
425 | 453 | flash_flexspi_nor_wait_bus_busy(dev); |
426 | 454 | memc_flexspi_reset(data->controller); |
| 455 | + } else if ((0 == (offset % SPI_NOR_BLOCK_SIZE)) && (0 == (size % SPI_NOR_BLOCK_SIZE))) { |
| 456 | + for (i = 0; i < num_blocks; i++) { |
| 457 | + flash_flexspi_nor_write_enable(dev); |
| 458 | + flash_flexspi_nor_erase_block(dev, offset); |
| 459 | + flash_flexspi_nor_wait_bus_busy(dev); |
| 460 | + memc_flexspi_reset(data->controller); |
| 461 | + offset += SPI_NOR_BLOCK_SIZE; |
| 462 | + } |
427 | 463 | } else { |
428 | 464 | for (i = 0; i < num_sectors; i++) { |
429 | 465 | flash_flexspi_nor_write_enable(dev); |
|
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