@@ -170,14 +170,11 @@ void npcx_miwu_irq_disable(const struct npcx_wui *wui)
170170 NPCX_WKEN (base , wui -> group ) &= ~BIT (wui -> bit );
171171}
172172
173- unsigned int npcx_miwu_irq_get_state (const struct npcx_wui * wui )
173+ bool npcx_miwu_irq_get_state (const struct npcx_wui * wui )
174174{
175175 const uint32_t base = DRV_CONFIG (miwu_devs [wui -> table ])-> base ;
176176
177- if (IS_BIT_SET (NPCX_WKEN (base , wui -> group ), wui -> bit ))
178- return 1 ;
179- else
180- return 0 ;
177+ return IS_BIT_SET (NPCX_WKEN (base , wui -> group ), wui -> bit );
181178}
182179
183180int npcx_miwu_interrupt_configure (const struct npcx_wui * wui ,
@@ -186,60 +183,58 @@ int npcx_miwu_interrupt_configure(const struct npcx_wui *wui,
186183 const uint32_t base = DRV_CONFIG (miwu_devs [wui -> table ])-> base ;
187184 uint8_t pmask = BIT (wui -> bit );
188185
189- if (mode == NPCX_MIWU_MODE_DISABLED ) {
190- /* Clear MIWU enable bit */
191- NPCX_WKEN (base , wui -> group ) &= ~pmask ;
186+ /* Disable interrupt of wake-up input source before configuring it */
187+ npcx_miwu_irq_disable (wui );
188+
189+ /* Handle interrupt for level trigger */
190+ if (mode == NPCX_MIWU_MODE_LEVEL ) {
191+ /* Set detection mode to level */
192+ NPCX_WKMOD (base , wui -> group ) |= pmask ;
193+ switch (trig ) {
194+ /* Enable interrupting on level high */
195+ case NPCX_MIWU_TRIG_HIGH :
196+ NPCX_WKEDG (base , wui -> group ) &= ~pmask ;
197+ break ;
198+ /* Enable interrupting on level low */
199+ case NPCX_MIWU_TRIG_LOW :
200+ NPCX_WKEDG (base , wui -> group ) |= pmask ;
201+ break ;
202+ default :
203+ return - EINVAL ;
204+ }
205+ /* Handle interrupt for edge trigger */
192206 } else {
193- /* Handle interrupt for level trigger */
194- if (mode == NPCX_MIWU_MODE_LEVEL ) {
195- /* Set detection mode to level */
196- NPCX_WKMOD (base , wui -> group ) |= pmask ;
197- switch (trig ) {
198- /* Enable interrupting on level high */
199- case NPCX_MIWU_TRIG_HIGH :
200- NPCX_WKEDG (base , wui -> group ) &= ~pmask ;
201- break ;
202- /* Enable interrupting on level low */
203- case NPCX_MIWU_TRIG_LOW :
204- NPCX_WKEDG (base , wui -> group ) |= pmask ;
205- break ;
206- default :
207- return - EINVAL ;
208- }
209- /* Handle interrupt for edge trigger */
210- } else {
211- /* Set detection mode to edge */
212- NPCX_WKMOD (base , wui -> group ) &= ~pmask ;
213- switch (trig ) {
214- /* Handle interrupting on falling edge */
215- case NPCX_MIWU_TRIG_LOW :
216- NPCX_WKAEDG (base , wui -> group ) &= ~pmask ;
217- NPCX_WKEDG (base , wui -> group ) |= pmask ;
218- break ;
219- /* Handle interrupting on rising edge */
220- case NPCX_MIWU_TRIG_HIGH :
221- NPCX_WKAEDG (base , wui -> group ) &= ~pmask ;
222- NPCX_WKEDG (base , wui -> group ) &= ~pmask ;
223- break ;
224- /* Handle interrupting on both edges */
225- case NPCX_MIWU_TRIG_BOTH :
226- /* Enable any edge */
227- NPCX_WKAEDG (base , wui -> group ) |= pmask ;
228- break ;
229- default :
230- return - EINVAL ;
231- }
207+ /* Set detection mode to edge */
208+ NPCX_WKMOD (base , wui -> group ) &= ~pmask ;
209+ switch (trig ) {
210+ /* Handle interrupting on falling edge */
211+ case NPCX_MIWU_TRIG_LOW :
212+ NPCX_WKAEDG (base , wui -> group ) &= ~pmask ;
213+ NPCX_WKEDG (base , wui -> group ) |= pmask ;
214+ break ;
215+ /* Handle interrupting on rising edge */
216+ case NPCX_MIWU_TRIG_HIGH :
217+ NPCX_WKAEDG (base , wui -> group ) &= ~pmask ;
218+ NPCX_WKEDG (base , wui -> group ) &= ~pmask ;
219+ break ;
220+ /* Handle interrupting on both edges */
221+ case NPCX_MIWU_TRIG_BOTH :
222+ /* Enable any edge */
223+ NPCX_WKAEDG (base , wui -> group ) |= pmask ;
224+ break ;
225+ default :
226+ return - EINVAL ;
232227 }
228+ }
233229
234- /* Enable wake-up input sources */
235- NPCX_WKINEN (base , wui -> group ) |= pmask ;
230+ /* Enable wake-up input sources */
231+ NPCX_WKINEN (base , wui -> group ) |= pmask ;
236232
237- /*
238- * Clear pending bit since it might be set if WKINEN bit is
239- * changed.
240- */
241- NPCX_WKPCL (base , wui -> group ) |= pmask ;
242- }
233+ /*
234+ * Clear pending bit since it might be set if WKINEN bit is
235+ * changed.
236+ */
237+ NPCX_WKPCL (base , wui -> group ) |= pmask ;
243238
244239 return 0 ;
245240}
@@ -333,8 +328,8 @@ int npcx_miwu_manage_dev_callback(struct miwu_dev_callback *cb, bool set)
333328 \
334329 /* Clear all MIWUs' pending and enable bits of MIWU device */ \
335330 for (i = 0 ; i < NPCX_MIWU_GROUP_COUNT ; i ++ ) { \
336- NPCX_WKPCL (base , i ) = 0xFF ; \
337331 NPCX_WKEN (base , i ) = 0 ; \
332+ NPCX_WKPCL (base , i ) = 0xFF ; \
338333 } \
339334 \
340335 /* Config IRQ and MWIU group directly */ \
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