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drivers: gpio: npm6001: initial driver
Add GPIO driver for the GPIO controller embedded in the nPM6001 PMIC. Signed-off-by: Gerard Marull-Paretas <[email protected]>
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‎drivers/gpio/CMakeLists.txt

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@@ -66,3 +66,4 @@ zephyr_library_sources_ifdef(CONFIG_GPIO_TCA6424A gpio_tca6424a.c)
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zephyr_library_sources_ifdef(CONFIG_GPIO_SHELL gpio_shell.c)
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zephyr_library_sources_ifdef(CONFIG_USERSPACE gpio_handlers.c)
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zephyr_library_sources_ifdef(CONFIG_GPIO_XMC4XXX gpio_xmc4xxx.c)
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zephyr_library_sources_ifdef(CONFIG_GPIO_NPM6001 gpio_npm6001.c)

‎drivers/gpio/Kconfig

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@@ -156,4 +156,6 @@ source "drivers/gpio/Kconfig.s32"
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source "drivers/gpio/Kconfig.tca6424a"
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source "drivers/gpio/Kconfig.npm6001"
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endif # GPIO

‎drivers/gpio/Kconfig.npm6001

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# Copyright (c) 2022 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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config GPIO_NPM6001
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bool "nPM6001 GPIO driver"
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default y
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depends on DT_HAS_NORDIC_NPM6001_GPIO_ENABLED
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select I2C
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help
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Enable the nPM6001 GPIO driver.
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config GPIO_NPM6001_INIT_PRIORITY
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int "nPM6001 GPIO driver initialization priority"
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depends on GPIO_NPM6001
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default 60
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help
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Initialization priority for the nPM6001 GPIO driver. It must be
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greater than the I2C controller init priority.

‎drivers/gpio/gpio_npm6001.c

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/*
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* Copyright (c) 2022 Nordic Semiconductor ASA
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT nordic_npm6001_gpio
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#include <errno.h>
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#include <zephyr/drivers/gpio.h>
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#include <zephyr/drivers/gpio/gpio_utils.h>
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#include <zephyr/drivers/i2c.h>
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#include <zephyr/dt-bindings/gpio/nordic-npm6001-gpio.h>
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#include <zephyr/kernel.h>
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#include <zephyr/sys/util_macro.h>
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#include <zephyr/toolchain.h>
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/* nPM6001 GPIO related registers */
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#define NPM6001_GPIOOUTSET 0x69U
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#define NPM6001_GPIOOUTCLR 0x6AU
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#define NPM6001_GPIOIN 0x6BU
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#define NPM6001_GPIO0CONF 0x6CU
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#define NPM6001_GPIO1CONF 0x6DU
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#define NPM6001_GPIO2CONF 0x6EU
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/* GPIO(0|1|2)CONF fields */
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#define NPM6001_CONF_DIRECTION_OUTPUT BIT(0)
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#define NPM6001_CONF_INPUT_ENABLED BIT(1)
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#define NPM6001_CONF_PULLDOWN_ENABLED BIT(2)
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#define NPM6001_CONF_DRIVE_HIGH BIT(5)
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#define NPM6001_CONF_SENSE_CMOS BIT(6)
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#define NPM6001_PIN_MAX 2U
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#define NPM6001_PIN_MSK 0x7U
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struct gpio_npm6001_config {
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struct gpio_driver_config common;
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struct i2c_dt_spec bus;
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};
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struct gpio_npm6001_data {
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struct gpio_driver_data common;
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};
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static int gpio_npm6001_port_get_raw(const struct device *dev, uint32_t *value)
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{
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const struct gpio_npm6001_config *config = dev->config;
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uint8_t reg = NPM6001_GPIOIN;
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uint8_t val;
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int ret;
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if (k_is_in_isr()) {
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return -EWOULDBLOCK;
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}
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ret = i2c_write_read_dt(&config->bus, &reg, sizeof(reg), &val,
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sizeof(val));
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if (ret < 0) {
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return ret;
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}
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*value = val;
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return 0;
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}
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static int gpio_npm6001_port_set_bits_raw(const struct device *dev,
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gpio_port_pins_t pins)
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{
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const struct gpio_npm6001_config *config = dev->config;
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uint8_t buf[2] = {NPM6001_GPIOOUTSET, (uint8_t)pins & NPM6001_PIN_MSK};
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if (k_is_in_isr()) {
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return -EWOULDBLOCK;
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}
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return i2c_write_dt(&config->bus, buf, sizeof(buf));
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}
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static int gpio_npm6001_port_clear_bits_raw(const struct device *dev,
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gpio_port_pins_t pins)
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{
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const struct gpio_npm6001_config *config = dev->config;
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uint8_t buf[2] = {NPM6001_GPIOOUTCLR, (uint8_t)pins & NPM6001_PIN_MSK};
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if (k_is_in_isr()) {
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return -EWOULDBLOCK;
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}
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return i2c_write_dt(&config->bus, buf, sizeof(buf));
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}
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static inline int gpio_npm6001_configure(const struct device *dev,
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gpio_pin_t pin, gpio_flags_t flags)
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{
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const struct gpio_npm6001_config *config = dev->config;
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uint8_t buf[2] = {NPM6001_GPIO0CONF, 0U};
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if (k_is_in_isr()) {
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return -EWOULDBLOCK;
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}
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if (pin > NPM6001_PIN_MAX) {
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return -EINVAL;
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}
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/* select GPIO0CONF/GPIO1CONF/GPIO2CONF */
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buf[0] += pin;
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if ((flags & GPIO_OUTPUT) != 0U) {
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/* input buffer enabled to allow reading output level */
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buf[1] |= NPM6001_CONF_DIRECTION_OUTPUT |
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NPM6001_CONF_INPUT_ENABLED;
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/* open-drain/open-source not supported */
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if ((flags & GPIO_SINGLE_ENDED) != 0U) {
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return -ENOTSUP;
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}
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/* drive strength (defaults to normal) */
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if ((flags & NPM6001_GPIO_DRIVE_MSK) ==
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NPM6001_GPIO_DRIVE_HIGH) {
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buf[1] |= NPM6001_CONF_DRIVE_HIGH;
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}
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if ((flags & GPIO_OUTPUT_INIT_HIGH) != 0U) {
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int ret;
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ret = gpio_npm6001_port_set_bits_raw(
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dev, (gpio_port_pins_t)BIT(pin));
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if (ret < 0) {
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return ret;
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}
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} else if ((flags & GPIO_OUTPUT_INIT_LOW) != 0U) {
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int ret;
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ret = gpio_npm6001_port_clear_bits_raw(
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dev, (gpio_port_pins_t)BIT(pin));
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if (ret < 0) {
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return ret;
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}
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}
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} else if ((flags & GPIO_INPUT) != 0U) {
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buf[1] |= NPM6001_CONF_INPUT_ENABLED;
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/* pull resistor */
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if ((flags & GPIO_PULL_DOWN) != 0U) {
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buf[1] |= NPM6001_CONF_PULLDOWN_ENABLED;
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} else if ((flags & GPIO_PULL_UP) != 0U) {
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return -ENOTSUP;
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}
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/* input type (defaults to schmitt trigger) */
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if ((flags & NPM6001_GPIO_SENSE_MSK) ==
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NPM6001_GPIO_SENSE_CMOS) {
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buf[1] |= NPM6001_CONF_SENSE_CMOS;
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}
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} else {
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return -ENOTSUP;
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}
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return i2c_write_dt(&config->bus, buf, sizeof(buf));
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}
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static int gpio_npm6001_port_set_masked_raw(const struct device *dev,
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gpio_port_pins_t mask,
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gpio_port_value_t value)
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{
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int ret;
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ret = gpio_npm6001_port_set_bits_raw(dev, mask & value);
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if (ret < 0) {
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return ret;
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}
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return gpio_npm6001_port_clear_bits_raw(
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dev, mask & (~value & NPM6001_PIN_MSK));
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}
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static int gpio_npm6001_port_toggle_bits(const struct device *dev,
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gpio_port_pins_t pins)
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{
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uint32_t val;
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int ret;
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ret = gpio_npm6001_port_get_raw(dev, &val);
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if (ret < 0) {
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return ret;
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}
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return gpio_npm6001_port_set_masked_raw(dev, pins,
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~val & NPM6001_PIN_MSK);
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}
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static int gpio_npm6001_pin_interrupt_configure(const struct device *dev,
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gpio_pin_t pin,
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enum gpio_int_mode mode,
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enum gpio_int_trig trig)
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{
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ARG_UNUSED(dev);
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ARG_UNUSED(pin);
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ARG_UNUSED(mode);
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ARG_UNUSED(trig);
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return -ENOTSUP;
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}
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static const struct gpio_driver_api gpio_npm6001_api = {
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.pin_configure = gpio_npm6001_configure,
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.port_get_raw = gpio_npm6001_port_get_raw,
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.port_set_masked_raw = gpio_npm6001_port_set_masked_raw,
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.port_set_bits_raw = gpio_npm6001_port_set_bits_raw,
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.port_clear_bits_raw = gpio_npm6001_port_clear_bits_raw,
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.port_toggle_bits = gpio_npm6001_port_toggle_bits,
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.pin_interrupt_configure = gpio_npm6001_pin_interrupt_configure,
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};
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static int gpio_npm6001_init(const struct device *dev)
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{
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const struct gpio_npm6001_config *config = dev->config;
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if (!device_is_ready(config->bus.bus)) {
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return -ENODEV;
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}
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return 0;
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}
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#define GPIO_NPM6001_DEFINE(n) \
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static const struct gpio_npm6001_config gpio_npm6001_config##n = { \
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.common = \
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{ \
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.port_pin_mask = \
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GPIO_PORT_PIN_MASK_FROM_DT_INST(n), \
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}, \
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.bus = I2C_DT_SPEC_GET(DT_INST_PARENT(n))}; \
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\
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static struct gpio_npm6001_data gpio_npm6001_data##n; \
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\
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DEVICE_DT_INST_DEFINE(n, &gpio_npm6001_init, NULL, \
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&gpio_npm6001_data##n, &gpio_npm6001_config##n, \
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POST_KERNEL, CONFIG_GPIO_NPM6001_INIT_PRIORITY, \
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&gpio_npm6001_api);
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DT_INST_FOREACH_STATUS_OKAY(GPIO_NPM6001_DEFINE)

‎dts/bindings/gpio/nordic,npm6001-gpio.yaml

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# Copyright (c) 2022 Nordic Semiconductor ASA
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# SPDX-License-Identifier: Apache-2.0
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description: nPM6001 GPIO Controller
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compatible: "nordic,npm6001-gpio"
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include: gpio-controller.yaml
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gpio-cells:
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- pin
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- flags

‎include/zephyr/dt-bindings/gpio/nordic-npm6001-gpio.h

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/*
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* Copyright (c) 2022 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_GPIO_NORDIC_NPM6001_GPIO_H_
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#define ZEPHYR_INCLUDE_DT_BINDINGS_GPIO_NORDIC_NPM6001_GPIO_H_
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/**
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* @brief nPM6001-specific GPIO Flags
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* @defgroup gpio_interface_npm6001 nPM6001-specific GPIO Flags
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*
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* The drive flags are encoded in the 8 upper bits of @ref gpio_dt_flags_t as
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* follows:
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*
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* - Bit 8: Drive strength (0=NORMAL, 1=HIGH)
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* - Bit 9: Input type (0=SCHMITT, 1=CMOS)
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*
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* @ingroup gpio_interface
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* @{
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*/
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/**
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* @name nPM6001 GPIO drive strength flags
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* @brief nPM6001 GPIO drive strength flags
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* @{
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*/
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/** @cond INTERNAL_HIDDEN */
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/** Drive mode field mask */
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#define NPM6001_GPIO_DRIVE_MSK 0x0100U
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/** @endcond */
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/** Normal drive */
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#define NPM6001_GPIO_DRIVE_NORMAL (0U << 8U)
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/** High drive */
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#define NPM6001_GPIO_DRIVE_HIGH (1U << 8U)
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/** @} */
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/**
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* @name nPM6001 GPIO drive strength flags
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* @brief nPM6001 GPIO drive strength flags
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* @{
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*/
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/** @cond INTERNAL_HIDDEN */
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/** Input type field mask */
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#define NPM6001_GPIO_SENSE_MSK 0x0200U
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/** @endcond */
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/** Schmitt trigger input type */
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#define NPM6001_GPIO_SENSE_SCHMITT (0U << 9U)
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/** CMOS input type */
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#define NPM6001_GPIO_SENSE_CMOS (1U << 9U)
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/** @} */
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/** @} */
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#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_GPIO_NORDIC_NRF_GPIO_H_ */

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