arch: arm: core: aarch32: limit ACTLR register access to Cortex-R

The configuration bits ATCMPCEN, B0TCMPCEN and B1TCMPCEN in the ACTLR
register referenced in the function z_arm_tcm_disable_ecc are only de-
fined for Cortex-R CPUs. For Cortex-A CPUs, those bits are declared
as reserved.

Comp.: https://arm-software.github.io/CMSIS_5/Core_A/html/group__CMSIS__ACTLR.html

Signed-off-by: Immo Birnbaum <[email protected]>

Author: ibirnbaum

arch/arm/core/aarch32/cortex_a_r/tcm.c

@@ -8,10 +8,12 @@
 
 void z_arm_tcm_disable_ecc(void)
 {
+#if defined(CONFIG_ARMV7_R)
 	uint32_t actlr;
 
 	actlr = __get_ACTLR();
 	actlr &= ~(ACTLR_ATCMPCEN_Msk | ACTLR_B0TCMPCEN_Msk |
 		ACTLR_B1TCMPCEN_Msk);
 	__set_ACTLR(actlr);
+#endif
 }