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saurabh-nxpgalak
saurabh-nxp
authored and
galak
committed
boards: arm: Enable FlexSPI driver on mimxrt685_evk.
Enable FlexSPI NOR flash driver with XIP build options. Configure FlexSPI pins, update board documentation. Add FlexSPI NOR flash dts node for mimxrt685_evk. Enable flash storage by adding partition to dts file. Using last 1MB for storage, and reserving 63MB for code. Signed-off-by: Saurabh Jagdhane <[email protected]>
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‎boards/arm/mimxrt685_evk/Kconfig.defconfig‎

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Original file line numberDiff line numberDiff line change
@@ -14,6 +14,16 @@ config XTAL_SYS_CLK_HZ
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config SYSOSC_SETTLING_US
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default 260
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config FLASH_MCUX_FLEXSPI_MX25UM51345G
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default y if FLASH
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config FLASH_MCUX_FLEXSPI_XIP
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default y if FLASH
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choice FLASH_MCUX_FLEXSPI_XIP_MEM_TARGET
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default FLASH_MCUX_FLEXSPI_XIP_MEM_SRAM
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endchoice
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1727
if GPIO_MCUX_LPC
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config GPIO_MCUX_LPC_PORT0

‎boards/arm/mimxrt685_evk/doc/index.rst‎

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Original file line numberDiff line numberDiff line change
@@ -71,6 +71,8 @@ features:
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+-----------+------------+-------------------------------------+
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| GPIO | on-chip | gpio |
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+-----------+------------+-------------------------------------+
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| FLASH | on-chip | OctalSPI Flash |
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+-----------+------------+-------------------------------------+
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| USART | on-chip | serial port-polling |
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+-----------+------------+-------------------------------------+
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| I2C | on-chip | i2c |
@@ -127,6 +129,28 @@ functionality of a pin.
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+---------+-----------------+----------------------------+
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| PIO0_9 | I2S | I2S DATAIN |
129131
+---------+-----------------+----------------------------+
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| PIO1_11 | FLEXSPI0B_DATA0 | OctalSPI Flash |
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+---------+-----------------+----------------------------+
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| PIO1_12 | FLEXSPI0B_DATA1 | OctalSPI Flash |
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+---------+-----------------+----------------------------+
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| PIO1_13 | FLEXSPI0B_DATA2 | OctalSPI Flash |
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+---------+-----------------+----------------------------+
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| PIO1_14 | FLEXSPI0B_DATA3 | OctalSPI Flash |
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+---------+-----------------+----------------------------+
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| PIO1_29 | FLEXSPI0B_SCLK | OctalSPI Flash |
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+---------+-----------------+----------------------------+
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| PIO2_12 | PIO2_12 | OctalSPI Flash |
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+---------+-----------------+----------------------------+
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| PIO2_17 | FLEXSPI0B_DATA4 | OctalSPI Flash |
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+---------+-----------------+----------------------------+
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| PIO2_18 | FLEXSPI0B_DATA5 | OctalSPI Flash |
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+---------+-----------------+----------------------------+
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| PIO2_19 | FLEXSPI0B_SS0_N | OctalSPI Flash |
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+---------+-----------------+----------------------------+
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| PIO2_22 | FLEXSPI0B_DATA6 | OctalSPI Flash |
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+---------+-----------------+----------------------------+
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| PIO2_23 | FLEXSPI0B_DATA7 | OctalSPI Flash |
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+---------+-----------------+----------------------------+
130154

131155
System Clock
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============

‎boards/arm/mimxrt685_evk/mimxrt685_evk_cm33.dts‎

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Original file line numberDiff line numberDiff line change
@@ -170,6 +170,30 @@ i2s1: &flexcomm3 {
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dma-names = "tx";
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};
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&flexspi {
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reg = <0x50134000 0x4000>, <0x18000000 DT_SIZE_M(64)>;
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mx25um51345g: mx25um51345g@2 {
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compatible = "nxp,imx-flexspi-mx25um51345g";
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size = <536870912>;
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label = "MX25UM51345G";
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reg = <2>;
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spi-max-frequency = <200000000>;
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status = "okay";
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jedec-id = [c2 81 3a];
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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storage_partition: partition@3f00000 {
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label = "storage";
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reg = <0x03f00000 DT_SIZE_M(1)>;
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};
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};
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};
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};
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&gpio0 {
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status = "okay";
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};

‎boards/arm/mimxrt685_evk/pinmux.c‎

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Original file line numberDiff line numberDiff line change
@@ -396,6 +396,239 @@ static int mimxrt685_evk_pinmux_init(const struct device *dev)
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/* PORT0 PIN9 (coords: L3) is configured as FC1_RXD_SDA_MOSI_DATA */
397397
IOPCTL_PinMuxSet(IOPCTL, 0U, 9U, port0_pin9_config);
398398

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#endif
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(flexspi), okay) && CONFIG_FLASH
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const uint32_t port1_pin11_config = (/* Pin is configured as FLEXSPI0B_DATA0 */
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IOPCTL_PIO_FUNC6 |
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/* Disable pull-up / pull-down function */
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IOPCTL_PIO_PUPD_DI |
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/* Enable pull-down function */
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IOPCTL_PIO_PULLDOWN_EN |
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/* Enables input buffer function */
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IOPCTL_PIO_INBUF_EN |
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/* Normal mode */
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IOPCTL_PIO_SLEW_RATE_NORMAL |
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/* Full drive enable */
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IOPCTL_PIO_FULLDRIVE_EN |
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/* Analog mux is disabled */
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IOPCTL_PIO_ANAMUX_DI |
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/* Pseudo Output Drain is disabled */
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IOPCTL_PIO_PSEDRAIN_DI |
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/* Input function is not inverted */
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IOPCTL_PIO_INV_DI);
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/* PORT1 PIN11 (coords: L2) is configured as FLEXSPI0B_DATA0 */
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IOPCTL_PinMuxSet(IOPCTL, 1U, 11U, port1_pin11_config);
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const uint32_t port1_pin12_config = (/* Pin is configured as FLEXSPI0B_DATA1 */
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IOPCTL_PIO_FUNC6 |
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/* Disable pull-up / pull-down function */
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IOPCTL_PIO_PUPD_DI |
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/* Enable pull-down function */
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IOPCTL_PIO_PULLDOWN_EN |
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/* Enables input buffer function */
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IOPCTL_PIO_INBUF_EN |
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/* Normal mode */
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IOPCTL_PIO_SLEW_RATE_NORMAL |
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/* Full drive enable */
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IOPCTL_PIO_FULLDRIVE_EN |
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/* Analog mux is disabled */
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IOPCTL_PIO_ANAMUX_DI |
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/* Pseudo Output Drain is disabled */
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IOPCTL_PIO_PSEDRAIN_DI |
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/* Input function is not inverted */
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IOPCTL_PIO_INV_DI);
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/* PORT1 PIN12 (coords: M2) is configured as FLEXSPI0B_DATA1 */
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IOPCTL_PinMuxSet(IOPCTL, 1U, 12U, port1_pin12_config);
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const uint32_t port1_pin13_config = (/* Pin is configured as FLEXSPI0B_DATA2 */
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IOPCTL_PIO_FUNC6 |
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/* Disable pull-up / pull-down function */
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IOPCTL_PIO_PUPD_DI |
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/* Enable pull-down function */
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IOPCTL_PIO_PULLDOWN_EN |
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/* Enables input buffer function */
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IOPCTL_PIO_INBUF_EN |
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/* Normal mode */
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IOPCTL_PIO_SLEW_RATE_NORMAL |
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/* Full drive enable */
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IOPCTL_PIO_FULLDRIVE_EN |
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/* Analog mux is disabled */
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IOPCTL_PIO_ANAMUX_DI |
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/* Pseudo Output Drain is disabled */
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IOPCTL_PIO_PSEDRAIN_DI |
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/* Input function is not inverted */
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IOPCTL_PIO_INV_DI);
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/* PORT1 PIN13 (coords: N1) is configured as FLEXSPI0B_DATA2 */
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IOPCTL_PinMuxSet(IOPCTL, 1U, 13U, port1_pin13_config);
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465+
const uint32_t port1_pin14_config = (/* Pin is configured as FLEXSPI0B_DATA3 */
466+
IOPCTL_PIO_FUNC6 |
467+
/* Disable pull-up / pull-down function */
468+
IOPCTL_PIO_PUPD_DI |
469+
/* Enable pull-down function */
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IOPCTL_PIO_PULLDOWN_EN |
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/* Enables input buffer function */
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IOPCTL_PIO_INBUF_EN |
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/* Normal mode */
474+
IOPCTL_PIO_SLEW_RATE_NORMAL |
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/* Full drive enable */
476+
IOPCTL_PIO_FULLDRIVE_EN |
477+
/* Analog mux is disabled */
478+
IOPCTL_PIO_ANAMUX_DI |
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/* Pseudo Output Drain is disabled */
480+
IOPCTL_PIO_PSEDRAIN_DI |
481+
/* Input function is not inverted */
482+
IOPCTL_PIO_INV_DI);
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/* PORT1 PIN14 (coords: N2) is configured as FLEXSPI0B_DATA3 */
484+
IOPCTL_PinMuxSet(IOPCTL, 1U, 14U, port1_pin14_config);
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486+
const uint32_t port1_pin29_config = (/* Pin is configured as FLEXSPI0B_SCLK */
487+
IOPCTL_PIO_FUNC5 |
488+
/* Disable pull-up / pull-down function */
489+
IOPCTL_PIO_PUPD_DI |
490+
/* Enable pull-down function */
491+
IOPCTL_PIO_PULLDOWN_EN |
492+
/* Enables input buffer function */
493+
IOPCTL_PIO_INBUF_EN |
494+
/* Normal mode */
495+
IOPCTL_PIO_SLEW_RATE_NORMAL |
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/* Full drive enable */
497+
IOPCTL_PIO_FULLDRIVE_EN |
498+
/* Analog mux is disabled */
499+
IOPCTL_PIO_ANAMUX_DI |
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/* Pseudo Output Drain is disabled */
501+
IOPCTL_PIO_PSEDRAIN_DI |
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/* Input function is not inverted */
503+
IOPCTL_PIO_INV_DI);
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/* PORT1 PIN29 (coords: U3) is configured as FLEXSPI0B_SCLK */
505+
IOPCTL_PinMuxSet(IOPCTL, 1U, 29U, port1_pin29_config);
506+
507+
const uint32_t port2_pin12_config = (/* Pin is configured as PIO2_12 */
508+
IOPCTL_PIO_FUNC0 |
509+
/* Disable pull-up / pull-down function */
510+
IOPCTL_PIO_PUPD_DI |
511+
/* Enable pull-down function */
512+
IOPCTL_PIO_PULLDOWN_EN |
513+
/* Disable input buffer function */
514+
IOPCTL_PIO_INBUF_DI |
515+
/* Normal mode */
516+
IOPCTL_PIO_SLEW_RATE_NORMAL |
517+
/* Normal drive */
518+
IOPCTL_PIO_FULLDRIVE_DI |
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/* Analog mux is disabled */
520+
IOPCTL_PIO_ANAMUX_DI |
521+
/* Pseudo Output Drain is disabled */
522+
IOPCTL_PIO_PSEDRAIN_DI |
523+
/* Input function is not inverted */
524+
IOPCTL_PIO_INV_DI);
525+
/* PORT2 PIN12 (coords: T3) is configured as PIO2_12 */
526+
IOPCTL_PinMuxSet(IOPCTL, 2U, 12U, port2_pin12_config);
527+
528+
const uint32_t port2_pin17_config = (/* Pin is configured as FLEXSPI0B_DATA4 */
529+
IOPCTL_PIO_FUNC6 |
530+
/* Disable pull-up / pull-down function */
531+
IOPCTL_PIO_PUPD_DI |
532+
/* Enable pull-down function */
533+
IOPCTL_PIO_PULLDOWN_EN |
534+
/* Enables input buffer function */
535+
IOPCTL_PIO_INBUF_EN |
536+
/* Normal mode */
537+
IOPCTL_PIO_SLEW_RATE_NORMAL |
538+
/* Full drive enable */
539+
IOPCTL_PIO_FULLDRIVE_EN |
540+
/* Analog mux is disabled */
541+
IOPCTL_PIO_ANAMUX_DI |
542+
/* Pseudo Output Drain is disabled */
543+
IOPCTL_PIO_PSEDRAIN_DI |
544+
/* Input function is not inverted */
545+
IOPCTL_PIO_INV_DI);
546+
/* PORT2 PIN17 (coords: U1) is configured as FLEXSPI0B_DATA4 */
547+
IOPCTL_PinMuxSet(IOPCTL, 2U, 17U, port2_pin17_config);
548+
549+
const uint32_t port2_pin18_config = (/* Pin is configured as FLEXSPI0B_DATA5 */
550+
IOPCTL_PIO_FUNC6 |
551+
/* Disable pull-up / pull-down function */
552+
IOPCTL_PIO_PUPD_DI |
553+
/* Enable pull-down function */
554+
IOPCTL_PIO_PULLDOWN_EN |
555+
/* Enables input buffer function */
556+
IOPCTL_PIO_INBUF_EN |
557+
/* Normal mode */
558+
IOPCTL_PIO_SLEW_RATE_NORMAL |
559+
/* Full drive enable */
560+
IOPCTL_PIO_FULLDRIVE_EN |
561+
/* Analog mux is disabled */
562+
IOPCTL_PIO_ANAMUX_DI |
563+
/* Pseudo Output Drain is disabled */
564+
IOPCTL_PIO_PSEDRAIN_DI |
565+
/* Input function is not inverted */
566+
IOPCTL_PIO_INV_DI);
567+
/* PORT2 PIN18 (coords: R2) is configured as FLEXSPI0B_DATA5 */
568+
IOPCTL_PinMuxSet(IOPCTL, 2U, 18U, port2_pin18_config);
569+
570+
const uint32_t port2_pin19_config = (/* Pin is configured as FLEXSPI0B_SS0_N */
571+
IOPCTL_PIO_FUNC6 |
572+
/* Disable pull-up / pull-down function */
573+
IOPCTL_PIO_PUPD_DI |
574+
/* Enable pull-down function */
575+
IOPCTL_PIO_PULLDOWN_EN |
576+
/* Enables input buffer function */
577+
IOPCTL_PIO_INBUF_EN |
578+
/* Normal mode */
579+
IOPCTL_PIO_SLEW_RATE_NORMAL |
580+
/* Full drive enable */
581+
IOPCTL_PIO_FULLDRIVE_EN |
582+
/* Analog mux is disabled */
583+
IOPCTL_PIO_ANAMUX_DI |
584+
/* Pseudo Output Drain is disabled */
585+
IOPCTL_PIO_PSEDRAIN_DI |
586+
/* Input function is not inverted */
587+
IOPCTL_PIO_INV_DI);
588+
/* PORT2 PIN19 (coords: T2) is configured as FLEXSPI0B_SS0_N */
589+
IOPCTL_PinMuxSet(IOPCTL, 2U, 19U, port2_pin19_config);
590+
591+
const uint32_t port2_pin22_config = (/* Pin is configured as FLEXSPI0B_DATA6 */
592+
IOPCTL_PIO_FUNC6 |
593+
/* Disable pull-up / pull-down function */
594+
IOPCTL_PIO_PUPD_DI |
595+
/* Enable pull-down function */
596+
IOPCTL_PIO_PULLDOWN_EN |
597+
/* Enables input buffer function */
598+
IOPCTL_PIO_INBUF_EN |
599+
/* Normal mode */
600+
IOPCTL_PIO_SLEW_RATE_NORMAL |
601+
/* Full drive enable */
602+
IOPCTL_PIO_FULLDRIVE_EN |
603+
/* Analog mux is disabled */
604+
IOPCTL_PIO_ANAMUX_DI |
605+
/* Pseudo Output Drain is disabled */
606+
IOPCTL_PIO_PSEDRAIN_DI |
607+
/* Input function is not inverted */
608+
IOPCTL_PIO_INV_DI);
609+
/* PORT2 PIN22 (coords: P3) is configured as FLEXSPI0B_DATA6 */
610+
IOPCTL_PinMuxSet(IOPCTL, 2U, 22U, port2_pin22_config);
611+
612+
const uint32_t port2_pin23_config = (/* Pin is configured as FLEXSPI0B_DATA7 */
613+
IOPCTL_PIO_FUNC6 |
614+
/* Disable pull-up / pull-down function */
615+
IOPCTL_PIO_PUPD_DI |
616+
/* Enable pull-down function */
617+
IOPCTL_PIO_PULLDOWN_EN |
618+
/* Enables input buffer function */
619+
IOPCTL_PIO_INBUF_EN |
620+
/* Normal mode */
621+
IOPCTL_PIO_SLEW_RATE_NORMAL |
622+
/* Full drive enable */
623+
IOPCTL_PIO_FULLDRIVE_EN |
624+
/* Analog mux is disabled */
625+
IOPCTL_PIO_ANAMUX_DI |
626+
/* Pseudo Output Drain is disabled */
627+
IOPCTL_PIO_PSEDRAIN_DI |
628+
/* Input function is not inverted */
629+
IOPCTL_PIO_INV_DI);
630+
/* PORT2 PIN23 (coords: P5) is configured as FLEXSPI0B_DATA7 */
631+
IOPCTL_PinMuxSet(IOPCTL, 2U, 23U, port2_pin23_config);
399632
#endif
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401634
return 0;

‎dts/bindings/mtd/nxp,imx-flexspi-mx25um51345g.yaml‎

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@@ -0,0 +1,8 @@
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# Copyright 2021 NXP
2+
# SPDX-License-Identifier: Apache-2.0
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description: NXP FlexSPI MX25UM51345G
5+
6+
compatible: "nxp,imx-flexspi-mx25um51345g"
7+
8+
include: ["nxp,imx-flexspi-device.yaml", soc-nv-flash.yaml]

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