@@ -348,14 +348,11 @@ flash_stm32_get_parameters(const struct device *dev)
348348
349349static struct flash_stm32_priv flash_data = {
350350 .regs = (FLASH_TypeDef * ) DT_INST_REG_ADDR (0 ),
351- #if defined(CONFIG_SOC_SERIES_STM32L4X ) || \
352- defined (CONFIG_SOC_SERIES_STM32F0X ) || \
353- defined (CONFIG_SOC_SERIES_STM32F1X ) || \
354- defined (CONFIG_SOC_SERIES_STM32F3X ) || \
355- defined (CONFIG_SOC_SERIES_STM32G0X ) || \
356- defined (CONFIG_SOC_SERIES_STM32G4X )
357- .pclken = { .bus = STM32_CLOCK_BUS_AHB1 ,
358- .enr = LL_AHB1_GRP1_PERIPH_FLASH },
351+ #if DT_INST_NODE_HAS_PROP (0 , clocks )
352+ .pclken = {
353+ .enr = DT_INST_CLOCKS_CELL (0 , bits ),
354+ .bus = DT_INST_CLOCKS_CELL (0 , bus ),
355+ }
359356#endif
360357};
361358
@@ -372,17 +369,15 @@ static const struct flash_driver_api flash_stm32_api = {
372369static int stm32_flash_init (const struct device * dev )
373370{
374371 int rc ;
375- #if defined(CONFIG_SOC_SERIES_STM32L4X ) || \
376- defined(CONFIG_SOC_SERIES_STM32F0X ) || \
377- defined(CONFIG_SOC_SERIES_STM32F1X ) || \
378- defined(CONFIG_SOC_SERIES_STM32F3X ) || \
379- defined(CONFIG_SOC_SERIES_STM32G0X )
372+ /* Below is applicable to L4, F0, F1, F3, G0*/
373+ #if DT_INST_NODE_HAS_PROP (0 , clocks )
380374 struct flash_stm32_priv * p = FLASH_STM32_PRIV (dev );
381375 const struct device * clk = DEVICE_DT_GET (STM32_CLOCK_CONTROL_NODE );
382376
383377 /*
384378 * On STM32F0, Flash interface clock source is always HSI,
385379 * so statically enable HSI here.
380+ * Below is applicable to F0, F1 and F3 as HSI is the source
386381 */
387382#if defined(CONFIG_SOC_SERIES_STM32F0X ) || \
388383 defined(CONFIG_SOC_SERIES_STM32F1X ) || \
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