@@ -34,7 +34,7 @@ static int max17262_reg_read(const struct device *dev, uint8_t reg_addr,
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rc = i2c_burst_read_dt (& cfg -> i2c , reg_addr , i2c_data , 2 );
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if (rc < 0 ) {
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- LOG_ERR ("Unable to read register" );
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+ LOG_ERR ("Unable to read register 0x%02x" , reg_addr );
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return rc ;
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}
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* valp = ((int16_t )i2c_data [1 ] << 8 ) | i2c_data [0 ];
@@ -225,14 +225,18 @@ static int max17262_gauge_init(const struct device *dev)
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{
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const struct max17262_config * const config = dev -> config ;
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int16_t tmp , hibcfg ;
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+ int rc ;
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if (!device_is_ready (config -> i2c .bus )) {
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LOG_ERR ("Bus device is not ready" );
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return - ENODEV ;
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}
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/* Read Status register */
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- max17262_reg_read (dev , STATUS , & tmp );
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+ rc = max17262_reg_read (dev , STATUS , & tmp );
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+ if (rc ) {
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+ return rc ;
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+ }
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if (!(tmp & STATUS_POR )) {
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/*
@@ -248,65 +252,114 @@ static int max17262_gauge_init(const struct device *dev)
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LOG_DBG ("POR detected, setting custom device configuration..." );
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/** STEP 1 */
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- max17262_reg_read (dev , FSTAT , & tmp );
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+ rc = max17262_reg_read (dev , FSTAT , & tmp );
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+ if (rc ) {
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+ return rc ;
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+ }
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/* Do not continue until FSTAT.DNR bit is cleared */
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while (tmp & FSTAT_DNR ) {
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k_sleep (K_MSEC (10 ));
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- max17262_reg_read (dev , FSTAT , & tmp );
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+ rc = max17262_reg_read (dev , FSTAT , & tmp );
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+ if (rc ) {
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+ return rc ;
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+ }
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}
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/** STEP 2 */
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/* Store original HibCFG value */
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- max17262_reg_read (dev , HIBCFG , & hibcfg );
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+ rc = max17262_reg_read (dev , HIBCFG , & hibcfg );
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+ if (rc ) {
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+ return rc ;
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+ }
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/* Exit Hibernate Mode step 1 */
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- max17262_reg_write (dev , SOFT_WAKEUP , 0x0090 );
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+ rc = max17262_reg_write (dev , SOFT_WAKEUP , 0x0090 );
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+ if (rc ) {
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+ return rc ;
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+ }
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+
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/* Exit Hibernate Mode step 2 */
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- max17262_reg_write (dev , HIBCFG , 0x0000 );
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+ rc = max17262_reg_write (dev , HIBCFG , 0x0000 );
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+ if (rc ) {
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+ return rc ;
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+ }
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+
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/* Exit Hibernate Mode step 3 */
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- max17262_reg_write (dev , SOFT_WAKEUP , 0x0000 );
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+ rc = max17262_reg_write (dev , SOFT_WAKEUP , 0x0000 );
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+ if (rc ) {
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+ return rc ;
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+ }
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/** STEP 2.1 --> OPTION 1 EZ Config (No INI file is needed) */
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/* Write DesignCap */
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- max17262_reg_write (dev , DESIGN_CAP , config -> design_cap );
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+ rc = max17262_reg_write (dev , DESIGN_CAP , config -> design_cap );
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+ if (rc ) {
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+ return rc ;
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+ }
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/* Write IChgTerm */
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- max17262_reg_write (dev , ICHG_TERM , config -> desired_charging_current );
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+ rc = max17262_reg_write (dev , ICHG_TERM , config -> desired_charging_current );
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+ if (rc ) {
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+ return rc ;
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+ }
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/* Write VEmpty */
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- max17262_reg_write (dev , VEMPTY , ((config -> empty_voltage / 10 ) << 7 ) |
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- ((config -> recovery_voltage / 40 ) & 0x7F ));
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+ rc = max17262_reg_write (dev , VEMPTY ,
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+ ((config -> empty_voltage / 10 ) << 7 ) |
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+ ((config -> recovery_voltage / 40 ) & 0x7F ));
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+ if (rc ) {
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+ return rc ;
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+ }
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/* Write ModelCFG */
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if (config -> charge_voltage > 4275 ) {
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- max17262_reg_write (dev , MODELCFG , 0x8400 );
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+ rc = max17262_reg_write (dev , MODELCFG , 0x8400 );
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} else {
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- max17262_reg_write (dev , MODELCFG , 0x8000 );
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+ rc = max17262_reg_write (dev , MODELCFG , 0x8000 );
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+ }
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+
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+ if (rc ) {
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+ return rc ;
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}
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/*
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* Read ModelCFG.Refresh (highest bit),
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* proceed to Step 3 when ModelCFG.Refresh == 0
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*/
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- max17262_reg_read (dev , MODELCFG , & tmp );
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+ rc = max17262_reg_read (dev , MODELCFG , & tmp );
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+ if (rc ) {
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+ return rc ;
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+ }
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/* Do not continue until ModelCFG.Refresh == 0 */
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while (tmp & MODELCFG_REFRESH ) {
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k_sleep (K_MSEC (10 ));
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- max17262_reg_read (dev , MODELCFG , & tmp );
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+ rc = max17262_reg_read (dev , MODELCFG , & tmp );
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+ if (rc ) {
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+ return rc ;
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+ }
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}
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/* Restore Original HibCFG value */
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- max17262_reg_write (dev , HIBCFG , hibcfg );
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+ rc = max17262_reg_write (dev , HIBCFG , hibcfg );
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+ if (rc ) {
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+ return rc ;
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+ }
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/** STEP 3 */
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/* Read Status register */
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- max17262_reg_read (dev , STATUS , & tmp );
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+ rc = max17262_reg_read (dev , STATUS , & tmp );
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+ if (rc ) {
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+ return rc ;
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+ }
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/* Clear PowerOnReset bit */
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tmp &= ~STATUS_POR ;
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- max17262_reg_write (dev , STATUS , tmp );
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+ rc = max17262_reg_write (dev , STATUS , tmp );
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+ if (rc ) {
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+ return rc ;
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+ }
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return 0 ;
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}
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