soc: arm: atmel: same70: enable the UPLL clock

Enable the UTMI PLL (UPLL) clock and add a static definition of its clock
frequency.

Signed-off-by: Henrik Brix Andersen <[email protected]>
Co-authored-by: Gerson Fernando Budke <[email protected]>

Author: 2 people

soc/arm/atmel_sam/same70/soc.c

@@ -177,6 +177,14 @@ static ALWAYS_INLINE void clock_init(void)
 		;
 	}
 
+	/* Setup UPLL */
+	PMC->CKGR_UCKR = CKGR_UCKR_UPLLCOUNT(0x3Fu) | CKGR_UCKR_UPLLEN;
+
+	/* Wait for PLL lock */
+	while (!(PMC->PMC_SR & PMC_SR_LOCKU)) {
+		;
+	}
+
 	/*
 	 * Final setup of the Master Clock
 	 */

soc/arm/atmel_sam/same70/soc.h

@@ -73,6 +73,9 @@
 #define SOC_ATMEL_SAM_MCK_FREQ_HZ \
 	(SOC_ATMEL_SAM_HCLK_FREQ_HZ / CONFIG_SOC_ATMEL_SAME70_MDIV)
 
+/** UTMI PLL clock (UPLLCK) Frequency */
+#define SOC_ATMEL_SAM_UPLLCK_FREQ_HZ MHZ(480)
+
 #endif /* _ASMLANGUAGE */
 
 #endif /* _ATMEL_SAME70_SOC_H_ */