arch: arm64: Add ARMv9-A architecture and Cortex-A510 CPU support

Add ARMv9-A architecture support with Cortex-A510 CPU as the default
processor for generic ARMv9-A targets.

Signed-off-by: Nicolas Pitre <[email protected]>

Author: Nicolas Pitre

arch/arm64/core/Kconfig

@@ -79,6 +79,16 @@ config CPU_CORTEX_A78
 	help
 	  This option signifies the use of a Cortex-A78 CPU
 
+config CPU_CORTEX_A510
+	bool
+	select CPU_CORTEX_A
+	select ARMV9_A
+	help
+	  This option signifies the use of a Cortex-A510 CPU, which is ARM's
+	  efficiency core implementing the ARMv9-A architecture. It provides
+	  power-efficient processing optimized for embedded applications with
+	  ARMv9-A features.
+
 config CPU_CORTEX_R82
 	bool
 	select CPU_AARCH64_CORTEX_R
@@ -223,6 +233,19 @@ config ARMV8_A
 	  so that it can support some features included in the AArch64 state.
 	  It supports the T32 and A32 instruction sets.
 
+config ARMV9_A
+	bool
+	select ATOMIC_OPERATIONS_BUILTIN
+	select CPU_HAS_MMU
+	select ARCH_HAS_USERSPACE if ARM_MMU
+	select ARCH_HAS_NOCACHE_MEMORY_SUPPORT if ARM_MMU
+	help
+	  This option signifies the use of an ARMv9-A processor
+	  implementation.
+	  ARMv9-A builds on ARMv8-A and introduces additional security,
+	  performance, and machine learning capabilities while maintaining
+	  backward compatibility with ARMv8-A software.
+
 rsource "xen/Kconfig"
 
 endif # CPU_CORTEX_A

cmake/compiler/iar/iccarm-cpu.cmake

@@ -95,6 +95,8 @@ elseif("${ARCH}" STREQUAL "arm64")
     set(ICCARM_CPU cortex-a76)
   elseif(CONFIG_CPU_CORTEX_A72)
     set(ICCARM_CPU Cortex-A72)
+  elseif(CONFIG_CPU_CORTEX_A510)
+    set(ICCARM_CPU Cortex-A510)
   elseif(CONFIG_CPU_CORTEX_R82)
     set(ICCARM_CPU Cortex-R82)
   endif()

cmake/gcc-m-cpu.cmake

@@ -115,6 +115,8 @@ elseif("${ARCH}" STREQUAL "arm64")
     set(GCC_M_CPU cortex-a72)
   elseif(CONFIG_CPU_CORTEX_A78)
     set(GCC_M_CPU cortex-a78)
+  elseif(CONFIG_CPU_CORTEX_A510)
+    set(GCC_M_CPU cortex-a510)
   elseif(CONFIG_CPU_CORTEX_R82)
     set(GCC_M_CPU cortex-r82)
   endif()

dts/arm64/armv9-a.dtsi

@@ -0,0 +1,16 @@
+/*
+ * Copyright (c) 2025 BayLibre SAS
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include "skeleton.dtsi"
+
+/ {
+	soc {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "simple-bus";
+		ranges;
+	};
+};

dts/bindings/cpu/arm,cortex-a510.yaml

@@ -0,0 +1,8 @@
+# Copyright (c) 2025 BayLibre SAS
+# SPDX-License-Identifier: Apache-2.0
+
+description: ARM Cortex-A510 CPU
+
+compatible: "arm,cortex-a510"
+
+include: cpu.yaml

soc/arm/fvp_aem/Kconfig

@@ -10,3 +10,8 @@ config SOC_FVP_V8A
 	bool
 	select ARM64
 	select CPU_CORTEX_A53
+
+config SOC_FVP_V9A
+	bool
+	select ARM64
+	select CPU_CORTEX_A510

soc/arm/fvp_aem/Kconfig.soc

@@ -9,8 +9,13 @@ config SOC_FVP_V8A
 	bool
 	select SOC_SERIES_FVP_AEM
 
+config SOC_FVP_V9A
+	bool
+	select SOC_SERIES_FVP_AEM
+
 config SOC
 	default "v8a" if SOC_FVP_V8A
+	default "v9a" if SOC_FVP_V9A
 
 config SOC_SERIES
 	default "fvp_aem" if SOC_SERIES_FVP_AEM

soc/arm/soc.yml

@@ -32,6 +32,7 @@ family:
   - name: fvp_aem
     socs:
     - name: v8a
+    - name: v9a
   - name: fvp_aemv8r
     socs:
     - name: fvp_aemv8r_aarch64

subsys/mgmt/mcumgr/grp/os_mgmt/include/os_mgmt_processor.h

@@ -133,6 +133,8 @@ extern "C" {
 #define PROCESSOR_NAME "cortex-a76"
 #elif defined(CONFIG_CPU_CORTEX_A78)
 #define PROCESSOR_NAME "cortex-a78"
+#elif defined(CONFIG_CPU_CORTEX_A510)
+#define PROCESSOR_NAME "cortex-a510"
 #elif defined(CONFIG_CPU_CORTEX_R82)
 #define PROCESSOR_NAME "armv8.4-a+nolse"
 #endif