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lines changed Original file line number Diff line number Diff line change 1+ # Copyright (c) 2023 IoT.bzh
2+ # SPDX-License-Identifier: Apache-2.0
3+
4+ if SOC_R8A779F0
5+
6+ config SOC
7+ default "r8a779f0"
8+
9+ config NUM_IRQS
10+ default 1216 #960 SPI + 256 LPI
11+
12+ config PINCTRL
13+ default y
14+
15+ endif # SOC_R8A779F0
Original file line number Diff line number Diff line change 1+ # Renesas R-Car Gen4 SoC line
2+
3+ # Copyright (c) 2023 IoT.bzh
4+ # SPDX-License-Identifier: Apache-2.0
5+
6+ if SOC_SERIES_RCAR_GEN4
7+
8+ source "soc/arm/renesas_rcar/gen4/Kconfig.defconfig.r8a779*"
9+
10+ config SOC_SERIES
11+ default "gen4"
12+
13+ endif # SOC_SERIES_RCAR_GEN4
Original file line number Diff line number Diff line change 1+ # Copyright (c) 2023 IoT.bzh
2+ # SPDX-License-Identifier: Apache-2.0
3+
4+ config SOC_SERIES_RCAR_GEN4
5+ bool "Renesas R-Car Gen4 Cortex R52"
6+ select ARM
7+ select CPU_CORTEX_R52
8+ select GIC_SINGLE_SECURITY_STATE
9+ select SOC_FAMILY_RCAR
10+ select CLOCK_CONTROL_RCAR_CPG_MSSR if CLOCK_CONTROL
11+ select ARM_ARCH_TIMER
12+ help
13+ Enable support for Renesas R-Car Gen4 SoC series
Original file line number Diff line number Diff line change 1+ # Copyright (c) 2023 IoT.bzh
2+ # SPDX-License-Identifier: Apache-2.0
3+
4+ choice
5+ prompt "Renesas RCar SoC Selection"
6+ depends on SOC_SERIES_RCAR_GEN4
7+
8+ config SOC_R8A779F0
9+ bool "r8a779f0"
10+
11+ endchoice
Original file line number Diff line number Diff line change 1+ /*
2+ * Copyright (c) 2023 IoT.bzh
3+ *
4+ * SPDX-License-Identifier: Apache-2.0
5+ */
6+
7+ #include < zephyr/arch/arm/cortex_a_r/scripts/linker.ld>
Original file line number Diff line number Diff line change 1+ /*
2+ * Copyright (c) 2023 IoT.bzh
3+ *
4+ * SPDX-License-Identifier: Apache-2.0
5+ *
6+ */
7+
8+ #ifndef _SOC__H_
9+ #define _SOC__H_
10+
11+ /* Define CMSIS configurations */
12+ #define __CR_REV 1U
13+
14+ /* Do not let CMSIS to handle GIC and Timer */
15+ #define __GIC_PRESENT 0
16+ #define __TIM_PRESENT 0
17+
18+ #endif /* _SOC__H_ */
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