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baords: stm32h750b_dk: introduce board variant for apps in ext Flash
Introduce a board variant for storing an app in external QSPI NOR Flash and chainloading it with MCUboot (placed in internal Flash) to be executed either in place (XiP) (set by default, MCUBOOT_MODE_DIRECT_XIP) or to be loaded to RAM and be executed there (MCUBOOT_MODE_RAM_LOAD). The new variant requires a board DT overlay on the MCUboot side to set the internal Flash & Flash controller as the chosen 'zephyr,flash' & 'zephyr,flash-controller'. Signed-off-by: Abderrahmane JARMOUNI <[email protected]>
1 parent e438e72 commit f308580

9 files changed

+393
-256
lines changed

boards/st/stm32h750b_dk/Kconfig.defconfig

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@@ -14,4 +14,11 @@ config MEMC
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endif # DISPLAY
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if MCUBOOT
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config STM32_MEMMAP
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default y
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endif # MCUBOOT
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endif # BOARD_STM32H750B_DK
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# SPDX-FileCopyrightText: Copyright The Zephyr Project Contributors
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# SPDX-License-Identifier: Apache-2.0
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choice BOOTLOADER
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default BOOTLOADER_MCUBOOT
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endchoice
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choice BOOT_SIGNATURE_TYPE
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default BOOT_SIGNATURE_TYPE_NONE
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endchoice
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choice MCUBOOT_MODE
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default MCUBOOT_MODE_DIRECT_XIP
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endchoice

boards/st/stm32h750b_dk/board.cmake

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# SPDX-FileCopyrightText: Copyright The Zephyr Project Contributors
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# SPDX-License-Identifier: Apache-2.0
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# keep first
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if(CONFIG_STM32_MEMMAP)
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if(CONFIG_STM32_MEMMAP OR CONFIG_BOOTLOADER_MCUBOOT)
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board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
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board_runner_args(stm32cubeprogrammer "--extload=MT25TL01G_STM32H750B-DISCO.stldr")
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else()

boards/st/stm32h750b_dk/board.yml

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@@ -4,3 +4,5 @@ board:
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vendor: st
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socs:
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- name: stm32h750xx
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variants:
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- name: ext_flash_app
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/*
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* Copyright (c) 2023-2024 STMicroelectronics
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <st/h7/stm32h750Xb.dtsi>
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#include <st/h7/stm32h750xbhx-pinctrl.dtsi>
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#include "arduino_r3_connector.dtsi"
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#include <zephyr/dt-bindings/input/input-event-codes.h>
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/ {
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chosen {
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zephyr,console = &usart3;
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zephyr,shell-uart = &usart3;
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zephyr,sram = &sram0;
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zephyr,display = &ltdc;
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};
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sdram2: sdram@d0000000 {
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compatible = "zephyr,memory-region", "mmio-sram";
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device_type = "memory";
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reg = <0xd0000000 DT_SIZE_M(16)>; /* 128Mbit */
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zephyr,memory-region = "SDRAM2";
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zephyr,memory-attr = <DT_MEM_ARM(ATTR_MPU_RAM)>;
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};
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ext_flash: memory@90000000 {
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compatible = "zephyr,memory-region";
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reg = <0x90000000 DT_SIZE_M(128)>; /* 128MB */
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zephyr,memory-region = "EXT_FLASH";
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zephyr,memory-attr = <DT_MEM_ARM_MPU_FLASH>;
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};
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leds {
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compatible = "gpio-leds";
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red_led: led_1 {
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gpios = <&gpioi 13 GPIO_ACTIVE_LOW>;
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label = "USER1 LD6";
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};
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green_led: led_2 {
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gpios = <&gpioj 2 GPIO_ACTIVE_LOW>;
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label = "USER2 LD7";
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};
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};
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gpio_keys {
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compatible = "gpio-keys";
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user_button: button {
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label = "User";
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gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>;
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zephyr,code = <INPUT_KEY_0>;
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};
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};
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aliases {
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led0 = &green_led;
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led1 = &red_led;
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sw0 = &user_button;
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die-temp0 = &die_temp;
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};
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};
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&clk_hse {
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clock-frequency = <DT_FREQ_M(25)>;
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hse-bypass;
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status = "okay";
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};
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&clk_lse {
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status = "okay";
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};
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&flash0 {
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status = "okay";
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};
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&ltdc {
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pinctrl-0 = <&ltdc_r0_pi15 &ltdc_r1_pj0 &ltdc_r2_pj1 &ltdc_r3_ph9
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&ltdc_r4_pj3 &ltdc_r5_pj4 &ltdc_r6_pj5 &ltdc_r7_pj6
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&ltdc_g0_pj7 &ltdc_g1_pj8 &ltdc_g2_pj9 &ltdc_g3_pj10
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&ltdc_g4_pj11 &ltdc_g5_pi0 &ltdc_g6_pi1 &ltdc_g7_pk2
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&ltdc_b0_pj12 &ltdc_b1_pj13 &ltdc_b2_pj14 &ltdc_b3_pj15
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&ltdc_b4_pk3 &ltdc_b5_pk4 &ltdc_b6_pk5 &ltdc_b7_pk6
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&ltdc_de_pk7 &ltdc_clk_pi14 &ltdc_hsync_pi12 &ltdc_vsync_pi9>;
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pinctrl-names = "default";
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disp-on-gpios = <&gpiod 7 GPIO_ACTIVE_HIGH>;
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ext-sdram = <&sdram2>;
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status = "okay";
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clocks = <&rcc STM32_CLOCK(APB3, 3)>,
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<&rcc STM32_SRC_PLL3_R NO_SEL>;
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width = <480>;
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height = <272>;
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pixel-format = <PANEL_PIXEL_FORMAT_RGB_565>;
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display-timings {
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compatible = "zephyr,panel-timing";
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de-active = <1>;
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pixelclk-active = <0>;
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hsync-active = <0>;
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vsync-active = <0>;
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hsync-len = <1>;
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vsync-len = <10>;
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hback-porch = <43>;
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vback-porch = <12>;
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hfront-porch = <8>;
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vfront-porch = <4>;
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};
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def-back-color-red = <0xFF>;
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def-back-color-green = <0xFF>;
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def-back-color-blue = <0xFF>;
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};
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&pll {
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div-m = <5>;
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mul-n = <192>;
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div-p = <2>;
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div-q = <4>;
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div-r = <4>;
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clocks = <&clk_hse>;
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status = "okay";
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};
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&pll3 {
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div-m = <5>;
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mul-n = <192>;
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div-p = <2>;
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div-q = <20>;
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div-r = <99>;
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clocks = <&clk_hse>;
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status = "okay";
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};
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&rcc {
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clocks = <&pll>;
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clock-frequency = <DT_FREQ_M(480)>;
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d1cpre = <1>;
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hpre = <2>;
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d1ppre = <2>;
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d2ppre1 = <2>;
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d2ppre2 = <2>;
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d3ppre = <2>;
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};
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&usart3 {
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pinctrl-0 = <&usart3_tx_pb10 &usart3_rx_pb11>;
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pinctrl-names = "default";
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current-speed = <115200>;
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status = "okay";
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};
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&quadspi {
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pinctrl-names = "default";
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pinctrl-0 = <&quadspi_clk_pf10 &quadspi_bk1_ncs_pg6
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&quadspi_bk1_io0_pd11 &quadspi_bk1_io1_pf9
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&quadspi_bk1_io2_pf7 &quadspi_bk1_io3_pf6
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&quadspi_bk2_io0_ph2 &quadspi_bk2_io1_ph3
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&quadspi_bk2_io2_pg9 &quadspi_bk2_io3_pg14>;
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dual-flash;
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status = "okay";
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/* Sector erase 64KB uniform granularity for each Flash */
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/* Subsector erase 4KB, 32KB granularity for each Flash */
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mt25ql512ab1: qspi-nor-flash-1@0 {
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compatible = "st,stm32-qspi-nor";
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reg = <0>;
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size = <DT_SIZE_M(512)>; /* 64MB for each Flash */
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write-block-size = <1>; /* 1byte=4bits*2 in dual-flash mode */
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erase-block-size = <DT_SIZE_K(128)>; /* 64KB*2 in dual-flash mode */
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qspi-max-frequency = <72000000>;
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cs-high-time = <4>; /* >= 50 ns */
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spi-bus-width = <4>;
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reset-cmd;
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status = "okay";
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};
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mt25ql512ab2: qspi-nor-flash-2@0 {
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compatible = "st,stm32-qspi-nor";
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reg = <0>;
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size = <DT_SIZE_M(512)>; /* 64MB */
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qspi-max-frequency = <72000000>;
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status = "okay";
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};
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};
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&fmc {
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pinctrl-0 = <&fmc_nbl0_pe0 &fmc_nbl1_pe1
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&fmc_sdclk_pg8 &fmc_sdnwe_ph5 &fmc_sdcke1_ph7
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&fmc_sdne1_ph6 &fmc_sdnras_pf11 &fmc_sdncas_pg15
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&fmc_a0_pf0 &fmc_a1_pf1 &fmc_a2_pf2 &fmc_a3_pf3 &fmc_a4_pf4
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&fmc_a5_pf5 &fmc_a6_pf12 &fmc_a7_pf13 &fmc_a8_pf14
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&fmc_a9_pf15 &fmc_a10_pg0 &fmc_a11_pg1
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&fmc_a14_pg4 &fmc_a15_pg5 &fmc_d0_pd14 &fmc_d1_pd15
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&fmc_d2_pd0 &fmc_d3_pd1 &fmc_d4_pe7 &fmc_d5_pe8 &fmc_d6_pe9
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&fmc_d7_pe10 &fmc_d8_pe11 &fmc_d9_pe12 &fmc_d10_pe13
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&fmc_d11_pe14 &fmc_d12_pe15 &fmc_d13_pd8 &fmc_d14_pd9
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&fmc_d15_pd10>;
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pinctrl-names = "default";
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status = "okay";
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sdram {
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status = "okay";
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power-up-delay = <100>;
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num-auto-refresh = <8>;
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mode-register = <0x230>;
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refresh-rate = <0x603>;
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bank@1 {
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reg = <1>;
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st,sdram-control = <STM32_FMC_SDRAM_NC_8
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STM32_FMC_SDRAM_NR_12
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STM32_FMC_SDRAM_MWID_16
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STM32_FMC_SDRAM_NB_4
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STM32_FMC_SDRAM_CAS_3
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STM32_FMC_SDRAM_SDCLK_PERIOD_2
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STM32_FMC_SDRAM_RBURST_ENABLE
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STM32_FMC_SDRAM_RPIPE_1>;
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st,sdram-timing = <2 7 4 7 2 2 2>;
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};
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};
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};
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&rtc {
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clocks = <&rcc STM32_CLOCK(APB4, 16)>,
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<&rcc STM32_SRC_LSE RTC_SEL(1)>;
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status = "okay";
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};
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&die_temp {
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status = "okay";
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};
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&adc3 {
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st,adc-clock-source = "SYNC";
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st,adc-prescaler = <4>;
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status = "okay";
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};
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/* Arduino Header pins: Tx:D1, Rx:D0 */
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/* LPUART1 can also be used with this pins */
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&usart1 {
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dma-names = "tx", "rx";
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pinctrl-0 = <&usart1_tx_pb6 &usart1_rx_pb7>;
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pinctrl-names = "default";
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current-speed = <115200>;
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status = "okay";
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};

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