soc: nordic: pinctrl: rework nordic,clock-enable

Instead of forcing users to provide this setting, allow to describe
which signals require CLOCKPIN enablement at device nodes. This is later
captured by the pinctrl macros and applied in the pinctrl driver. Note
that name has been adjusted to nordic,clockpin-enable to avoid confusion
with clock related settings.

Signed-off-by: Gerard Marull-Paretas <[email protected]>

Author: gmarull

drivers/pinctrl/pinctrl_nrf.c

@@ -365,7 +365,7 @@ int pinctrl_configure_pins(const pinctrl_soc_pin_t *pins, uint8_t pin_cnt,
 			nrf_gpio_cfg(pin, dir, input, NRF_GET_PULL(pins[i]),
 				     drive, NRF_GPIO_PIN_NOSENSE);
 #if NRF_GPIO_HAS_CLOCKPIN
-			nrf_gpio_pin_clock_set(pin, NRF_GET_CLOCK_ENABLE(pins[i]));
+			nrf_gpio_pin_clock_set(pin, NRF_GET_CLOCKPIN_ENABLE(pins[i]));
 #endif
 		}
 	}

dts/bindings/pinctrl/nordic-clockpin.yaml

@@ -0,0 +1,8 @@
+# Copyright (c) 2024 Nordic Semiconductor ASA
+# SPDX-License-Identifier: Apache-2.0
+
+properties:
+  nordic,clockpin-enable:
+    type: array
+    description: |
+      List of signals that require CLOCKPIN setting enablement.

include/zephyr/dt-bindings/pinctrl/nrf-pinctrl.h

@@ -10,7 +10,8 @@
  * The whole nRF pin configuration information is encoded in a 32-bit bitfield
  * organized as follows:
  *
- * - 31..17: Pin function.
+ * - 31..18: Pin function.
+ * - 17:     Clockpin enable.
  * - 16:     Pin inversion mode.
  * - 15:     Pin low power mode.
  * - 14..11: Pin output drive configuration.
@@ -27,10 +28,10 @@
 #define NRF_FUN_POS 18U
 /** Mask for the function field. */
 #define NRF_FUN_MSK 0x3FFFU
-/** Position of the clock enable field. */
-#define NRF_CLOCK_ENABLE_POS 17U
-/** Mask for the clock enable field. */
-#define NRF_CLOCK_ENABLE_MSK 0x1U
+/** Position of the clockpin enable field. */
+#define NRF_CLOCKPIN_ENABLE_POS 17U
+/** Mask for the clockpin enable field. */
+#define NRF_CLOCKPIN_ENABLE_MSK 0x1U
 /** Position of the invert field. */
 #define NRF_INVERT_POS 16U
 /** Mask for the invert field. */

soc/nordic/common/pinctrl_soc.h

@@ -25,21 +25,52 @@ extern "C" {
 /** Type for nRF pin. */
 typedef uint32_t pinctrl_soc_pin_t;
 
+/**
+ * @brief Utility macro to check if a function requires clockpin enable.
+ *
+ * @param node_id Node identifier.
+ * @param prop Property name.
+ * @param idx Property entry index.
+ * @param p_node_id Parent node identifier.
+ */
+#define Z_CHECK_CLOCKPIN_ENABLE(node_id, prop, idx, fun) \
+	DT_PROP_BY_IDX(node_id, prop, idx) == fun ? BIT(NRF_CLOCKPIN_ENABLE_POS) :
+
+/**
+ * @brief Utility macro compute the clockpin enable bit.
+ *
+ * @note DT_FOREACH_PROP_ELEM_SEP_VARGS() is used instead of
+ * DT_FOREACH_PROP_ELEM_VARGS() because the latter is already resolved in the
+ * same run.
+ *
+ * @param node_id Node identifier.
+ * @param prop Property name.
+ * @param idx Property entry index.
+ * @param p_node_id Parent node identifier.
+ */
+#define Z_GET_CLOCKPIN_ENABLE(node_id, prop, idx, p_node_id)		            \
+	COND_CODE_1(DT_NODE_HAS_PROP(p_node_id, nordic_clockpin_enable),            \
+		    ((DT_FOREACH_PROP_ELEM_SEP_VARGS(			            \
+			p_node_id, nordic_clockpin_enable, Z_CHECK_CLOCKPIN_ENABLE, \
+			(), NRF_GET_FUN(DT_PROP_BY_IDX(node_id, prop, idx)))        \
+		      0)), (0))
+
 /**
  * @brief Utility macro to initialize each pin.
  *
  * @param node_id Node identifier.
  * @param prop Property name.
  * @param idx Property entry index.
+ * @param p_node_id Parent node identifier.
  */
-#define Z_PINCTRL_STATE_PIN_INIT(node_id, prop, idx)			       \
+#define Z_PINCTRL_STATE_PIN_INIT(node_id, prop, idx, p_node_id)		       \
 	(DT_PROP_BY_IDX(node_id, prop, idx) |				       \
 	 ((NRF_PULL_DOWN * DT_PROP(node_id, bias_pull_down)) << NRF_PULL_POS) |\
 	 ((NRF_PULL_UP * DT_PROP(node_id, bias_pull_up)) << NRF_PULL_POS) |    \
 	 (DT_PROP(node_id, nordic_drive_mode) << NRF_DRIVE_POS) |	       \
 	 ((NRF_LP_ENABLE * DT_PROP(node_id, low_power_enable)) << NRF_LP_POS) |\
 	 (DT_PROP(node_id, nordic_invert) << NRF_INVERT_POS) |		       \
-	 (DT_PROP(node_id, nordic_clock_enable) << NRF_CLOCK_ENABLE_POS)       \
+	 Z_GET_CLOCKPIN_ENABLE(node_id, prop, idx, p_node_id)		       \
 	),
 
 /**
@@ -50,8 +81,8 @@ typedef uint32_t pinctrl_soc_pin_t;
  */
 #define Z_PINCTRL_STATE_PINS_INIT(node_id, prop)			       \
 	{DT_FOREACH_CHILD_VARGS(DT_PHANDLE(node_id, prop),		       \
-				DT_FOREACH_PROP_ELEM, psels,		       \
-				Z_PINCTRL_STATE_PIN_INIT)}
+				DT_FOREACH_PROP_ELEM_VARGS, psels,	       \
+				Z_PINCTRL_STATE_PIN_INIT, node_id)}
 
 /**
  * @brief Utility macro to obtain pin function.
@@ -61,11 +92,12 @@ typedef uint32_t pinctrl_soc_pin_t;
 #define NRF_GET_FUN(pincfg) (((pincfg) >> NRF_FUN_POS) & NRF_FUN_MSK)
 
 /**
- * @brief Utility macro to obtain pin clock enable flag.
+ * @brief Utility macro to obtain pin clockpin enable flag.
  *
  * @param pincfg Pin configuration bit field.
  */
-#define NRF_GET_CLOCK_ENABLE(pincfg) (((pincfg) >> NRF_CLOCK_ENABLE_POS) & NRF_CLOCK_ENABLE_MSK)
+#define NRF_GET_CLOCKPIN_ENABLE(pincfg) \
+	(((pincfg) >> NRF_CLOCKPIN_ENABLE_POS) & NRF_CLOCKPIN_ENABLE_MSK)
 
 /**
  * @brief Utility macro to obtain pin inversion flag.