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lines changed Original file line number Diff line number Diff line change 68
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};
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&pll1 {
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- clocks = <&clk_hsi>;
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- div-m = <4>;
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- mul-n = <75>;
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+ clocks = <&clk_hse>;
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+ div-m = <3>;
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+ mul-n = <150>;
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+ div-p1 = <1>;
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+ div-p2 = <1>;
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+ status = "okay";
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+ };
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+
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+ &pll3 {
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+ clocks = <&clk_hse>;
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+ div-m = <3>;
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+ mul-n = <125>;
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div-p1 = <1>;
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div-p2 = <1>;
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status = "okay";
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};
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&ic1 {
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pll-src = <1>;
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- ic-div = <2 >;
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+ ic-div = <3 >;
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status = "okay";
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};
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&ic2 {
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pll-src = <1>;
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- ic-div = <3 >;
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+ ic-div = <6 >;
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status = "okay";
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};
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&ic6 {
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- pll-src = <1 >;
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+ pll-src = <3 >;
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ic-div = <2>;
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status = "okay";
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};
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&cpusw {
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clocks = <&rcc STM32_SRC_IC1 CPU_SEL(3)>;
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- clock-frequency = <DT_FREQ_M(600 )>;
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+ clock-frequency = <DT_FREQ_M(800 )>;
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status = "okay";
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};
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clocks = <&ic2>;
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clock-frequency = <DT_FREQ_M(400)>;
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ahb-prescaler = <2>;
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- apb1-prescaler = <1>;
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- apb2-prescaler = <1>;
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- apb4-prescaler = <1>;
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- apb5-prescaler = <1>;
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+ timg-prescaler = <2>;
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};
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&adc1 {
Original file line number Diff line number Diff line change 60
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};
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&pll1 {
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- clocks = <&clk_hsi >;
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- div-m = <4 >;
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- mul-n = <75 >;
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+ clocks = <&clk_hse >;
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+ div-m = <3 >;
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+ mul-n = <150 >;
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div-p1 = <1>;
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div-p2 = <1>;
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status = "okay";
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};
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&pll2 {
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clocks = <&clk_hsi>;
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- div-m = <4>;
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- mul-n = <24>;
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- div-p1 = <2>;
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- div-p2 = <2>;
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+ div-m = <2>;
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+ mul-n = <48>;
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+ div-p1 = <1>;
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+ div-p2 = <1>;
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+ status = "okay";
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+ };
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+
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+ &pll3 {
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+ clocks = <&clk_hse>;
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+ div-m = <3>;
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+ mul-n = <125>;
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+ div-p1 = <1>;
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+ div-p2 = <1>;
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status = "okay";
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};
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&ic1 {
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pll-src = <1>;
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- ic-div = <2 >;
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+ ic-div = <3 >;
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status = "okay";
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};
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&ic2 {
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pll-src = <1>;
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- ic-div = <3 >;
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+ ic-div = <6 >;
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status = "okay";
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};
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&ic4 {
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pll-src = <2>;
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- ic-div = <2 >;
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+ ic-div = <32 >;
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status = "okay";
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};
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&ic6 {
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- pll-src = <1 >;
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+ pll-src = <3 >;
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ic-div = <2>;
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status = "okay";
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};
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&cpusw {
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clocks = <&rcc STM32_SRC_IC1 CPU_SEL(3)>;
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- clock-frequency = <DT_FREQ_M(600 )>;
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+ clock-frequency = <DT_FREQ_M(800 )>;
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status = "okay";
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};
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clocks = <&ic2>;
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clock-frequency = <DT_FREQ_M(400)>;
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ahb-prescaler = <2>;
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- apb1-prescaler = <1>;
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- apb2-prescaler = <1>;
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- apb4-prescaler = <1>;
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- apb5-prescaler = <1>;
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+ timg-prescaler = <2>;
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};
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&adc1 {
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