drivers: eth: phy_mii: Add BMSR second read in update_link state

The ICS1894 phy AN_COMPLETE bit is latched high, this make the
BMSR first read return incorrect status of the AN state, update
one more BMSR read to ensure all latched bit is clear and BMSR
return actual status of the phy chip

Signed-off-by: Duy Nguyen <[email protected]>

Author: duynguyenxa

drivers/ethernet/phy/phy_mii.c

@@ -205,6 +205,14 @@ static int update_link_state(const struct device *dev)
 
 		k_sleep(K_MSEC(100));
 
+		/* On some PHY chips, the BMSR bits are latched, so the first read may
+		 * show incorrect status. A second read ensures correct values.
+		 */
+		if (phy_mii_reg_read(dev, MII_BMSR, &bmsr_reg) < 0) {
+			return -EIO;
+		}
+
+		/* Second read, clears the latched bits and gives the correct status */
 		if (phy_mii_reg_read(dev, MII_BMSR, &bmsr_reg) < 0) {
 			return -EIO;
 		}