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galaknashif
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pinmux: sifive: Convert SiFive pinmux to be devicetree based
Add a simple pinctrl node for the IOF registers under the GPIO controller node to be used by the pinmux driver. Signed-off-by: Kumar Gala <[email protected]>
1 parent d6b4995 commit f6b7dd0

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7 files changed

+39
-13
lines changed

7 files changed

+39
-13
lines changed

boards/riscv/hifive1/pinmux.c

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -12,7 +12,9 @@ static int hifive1_pinmux_init(const struct device *dev)
1212
{
1313
ARG_UNUSED(dev);
1414

15-
const struct device *p = device_get_binding(CONFIG_PINMUX_SIFIVE_0_NAME);
15+
const struct device *p = DEVICE_DT_GET(DT_NODELABEL(pinctrl));
16+
17+
__ASSERT_NO_MSG(device_is_ready(p));
1618

1719
/* UART0 RX */
1820
pinmux_pin_set(p, 16, SIFIVE_PINMUX_IOF0);

boards/riscv/hifive1_revb/pinmux.c

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -12,7 +12,9 @@ static int hifive1_revb_pinmux_init(const struct device *dev)
1212
{
1313
ARG_UNUSED(dev);
1414

15-
const struct device *p = device_get_binding(CONFIG_PINMUX_SIFIVE_0_NAME);
15+
const struct device *p = DEVICE_DT_GET(DT_NODELABEL(pinctrl));
16+
17+
__ASSERT_NO_MSG(device_is_ready(p));
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1719
#ifdef CONFIG_UART_SIFIVE
1820
#ifdef CONFIG_UART_SIFIVE_PORT_0

drivers/pinmux/Kconfig.sifive

Lines changed: 1 addition & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -3,13 +3,8 @@
33
# Copyright (c) 2017 Jean-Paul Etienne <[email protected]>
44
# SPDX-License-Identifier: Apache-2.0
55

6-
menuconfig PINMUX_SIFIVE
6+
config PINMUX_SIFIVE
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bool "SiFive Freedom SOC pinmux driver"
88
depends on SOC_SERIES_RISCV_SIFIVE_FREEDOM
99
help
1010
Enable driver for the SiFive Freedom SOC pinmux driver
11-
12-
config PINMUX_SIFIVE_0_NAME
13-
string "SIFIVE pinmux 0 driver name"
14-
default "pinmux0"
15-
depends on PINMUX_SIFIVE

drivers/pinmux/pinmux_sifive.c

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -4,6 +4,8 @@
44
* SPDX-License-Identifier: Apache-2.0
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*/
66

7+
#define DT_DRV_COMPAT sifive_iof
8+
79
/**
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* @brief PINMUX driver for the SiFive Freedom Processor
911
*/
@@ -94,10 +96,10 @@ static const struct pinmux_driver_api pinmux_sifive_driver_api = {
9496
};
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9698
static const struct pinmux_sifive_config pinmux_sifive_0_config = {
97-
.base = SIFIVE_PINMUX_0_BASE_ADDR,
99+
.base = DT_INST_REG_ADDR(0),
98100
};
99101

100-
DEVICE_DEFINE(pinmux_sifive_0, CONFIG_PINMUX_SIFIVE_0_NAME,
102+
DEVICE_DT_INST_DEFINE(0,
101103
&pinmux_sifive_init, device_pm_control_nop, NULL,
102104
&pinmux_sifive_0_config,
103105
PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEFAULT,
Lines changed: 19 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,19 @@
1+
# Copyright (c) 2021, Linaro Limited
2+
# SPDX-License-Identifier: Apache-2.0
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4+
description: |
5+
SiFive FE310 IO Function (iof)
6+
Binding covers the IOF_EN/IOF_SEL registers that are a subset of the GPIO
7+
controller.
8+
9+
compatible: "sifive,iof"
10+
11+
include: base.yaml
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properties:
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reg:
15+
required: true
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17+
pinmux-cells:
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- pin
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- function

dts/riscv/riscv32-fe310.dtsi

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -93,6 +93,15 @@
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label = "gpio_0";
9494
status = "disabled";
9595
#gpio-cells = <2>;
96+
97+
#address-cells = <1>;
98+
#size-cells = <1>;
99+
ranges;
100+
101+
pinctrl: pinctrl@10012038 {
102+
compatible = "sifive,iof";
103+
reg = <0x10012038 0x8>;
104+
};
96105
};
97106
i2c0: i2c@10016000 {
98107
compatible = "sifive,i2c0";

soc/riscv/riscv-privilege/sifive-freedom/soc.h

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -14,9 +14,6 @@
1414
#include <soc_common.h>
1515
#include <devicetree.h>
1616

17-
/* PINMUX Configuration */
18-
#define SIFIVE_PINMUX_0_BASE_ADDR (DT_REG_ADDR(DT_INST(0, sifive_gpio0)) + 0x38)
19-
2017
/* PINMUX IO Hardware Functions */
2118
#define SIFIVE_PINMUX_IOF0 0x00
2219
#define SIFIVE_PINMUX_IOF1 0x01

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