dts: flash: write/erase block size to stm32h7 devs

Define write and erase block size for supported stm32h7 devices
Use a specific compatible string for stm32h7 devices for the flash
driver

Signed-off-by: Nicolas VINCENT <[email protected]>

Author: nvincent-vossloh

dts/arm/st/h7/stm32h7.dtsi

@@ -40,7 +40,7 @@
 
 	soc {
 		flash: flash-controller@52002000 {
-			compatible = "st,stm32-flash-controller", "st,stm32h7-flash-controller";
+			compatible = "st,stm32h7-flash-controller";
 			label = "FLASH_CTRL";
 			reg = <0x52002000 0x400>;
 			interrupts = <4 0>;

dts/arm/st/h7/stm32h723.dtsi

@@ -6,6 +6,14 @@
 #include <st/h7/stm32h7.dtsi>
 
 / {
+	soc {
+		flash-controller@52002000 {
+			flash0: flash@8000000 {
+				write-block-size = <32>;
+				erase-block-size = <DT_SIZE_K(128)>;
+			};
+		};
+	};
 	/* DTCM memory directly coppled to CPU */
 	dtcm: memory@20000000 {
 		compatible = "arm,dtcm";

dts/arm/st/h7/stm32h743.dtsi

@@ -7,6 +7,14 @@
 #include <st/h7/stm32h7.dtsi>
 
 / {
+	soc {
+		flash-controller@52002000 {
+			flash0: flash@8000000 {
+				write-block-size = <32>;
+				erase-block-size = <DT_SIZE_K(128)>;
+			};
+		};
+	};
 	/* system data RAM accessible over over AXI bus */
 	sram0: memory@24000000 {
 		compatible = "mmio-sram";

dts/arm/st/h7/stm32h745.dtsi

@@ -7,6 +7,14 @@
 #include <st/h7/stm32h7_dualcore.dtsi>
 
 / {
+	soc {
+		flash-controller@52002000 {
+			flash0: flash@8000000 {
+				write-block-size = <32>;
+				erase-block-size = <DT_SIZE_K(128)>;
+			};
+		};
+	};
 	/*
 	* The RAM memories placed here can be used by both cores M4/M7
 	* For more information see reference manual and datasheet to STM32H745