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Danh Doankartben
Danh Doan
authored and
kartben
committed
dts: arm: renesas: add PWM support for Renesas RA6, RA4, RA2
Add PWM support for RA6, RA4, RA2 MCU: ra6-cm4, ra6-cm33, ra4-cm4, ra4-cm33, ra2xx Signed-off-by: Danh Doan <[email protected]>
1 parent 90b810f commit f75e3ba

15 files changed

+625
-0
lines changed

‎dts/arm/renesas/ra/ra2/r7fa2a1xh.dtsi‎

Lines changed: 61 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -6,6 +6,7 @@
66

77
#include <arm/renesas/ra/ra2/ra2xx.dtsi>
88
#include <zephyr/dt-bindings/clock/ra_clock.h>
9+
#include <zephyr/dt-bindings/pwm/ra_pwm.h>
910

1011
/delete-node/ &sci2;
1112
/delete-node/ &sci3;
@@ -25,6 +26,66 @@
2526
interrupts = <16 1>, <17 1>, <18 1>, <19 1>;
2627
interrupt-names = "rxi", "txi", "tei", "eri";
2728
};
29+
30+
pwm1: pwm1@40078100 {
31+
compatible = "renesas,ra-pwm";
32+
divider = <RA_PWM_SOURCE_DIV_1>;
33+
channel = <RA_PWM_CHANNEL_1>;
34+
clocks = <&pclkd MSTPD 6>;
35+
reg = <0x40078100 0x100>;
36+
#pwm-cells = <3>;
37+
status = "disabled";
38+
};
39+
40+
pwm2: pwm2@40078200 {
41+
compatible = "renesas,ra-pwm";
42+
divider = <RA_PWM_SOURCE_DIV_1>;
43+
channel = <RA_PWM_CHANNEL_2>;
44+
clocks = <&pclkd MSTPD 6>;
45+
reg = <0x40078200 0x100>;
46+
#pwm-cells = <3>;
47+
status = "disabled";
48+
};
49+
50+
pwm3: pwm3@40078300 {
51+
compatible = "renesas,ra-pwm";
52+
divider = <RA_PWM_SOURCE_DIV_1>;
53+
channel = <RA_PWM_CHANNEL_3>;
54+
clocks = <&pclkd MSTPD 6>;
55+
reg = <0x40078300 0x100>;
56+
#pwm-cells = <3>;
57+
status = "disabled";
58+
};
59+
60+
pwm4: pwm4@40078400 {
61+
compatible = "renesas,ra-pwm";
62+
divider = <RA_PWM_SOURCE_DIV_1>;
63+
channel = <RA_PWM_CHANNEL_4>;
64+
clocks = <&pclkd MSTPD 6>;
65+
reg = <0x40078400 0x100>;
66+
#pwm-cells = <3>;
67+
status = "disabled";
68+
};
69+
70+
pwm5: pwm5@40078500 {
71+
compatible = "renesas,ra-pwm";
72+
divider = <RA_PWM_SOURCE_DIV_1>;
73+
channel = <RA_PWM_CHANNEL_5>;
74+
clocks = <&pclkd MSTPD 6>;
75+
reg = <0x40078500 0x100>;
76+
#pwm-cells = <3>;
77+
status = "disabled";
78+
};
79+
80+
pwm6: pwm6@40078600 {
81+
compatible = "renesas,ra-pwm";
82+
divider = <RA_PWM_SOURCE_DIV_1>;
83+
channel = <RA_PWM_CHANNEL_6>;
84+
clocks = <&pclkd MSTPD 6>;
85+
reg = <0x40078600 0x100>;
86+
#pwm-cells = <3>;
87+
status = "disabled";
88+
};
2889
};
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clocks: clocks {

‎dts/arm/renesas/ra/ra2/ra2xx.dtsi‎

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Original file line numberDiff line numberDiff line change
@@ -8,6 +8,7 @@
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#include <arm/armv8-m.dtsi>
99
#include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-ra.h>
1010
#include <zephyr/dt-bindings/clock/ra_clock.h>
11+
#include <zephyr/dt-bindings/pwm/ra_pwm.h>
1112
#include <freq.h>
1213

1314
/ {
@@ -339,6 +340,16 @@
339340
#port-irq-cells = <0>;
340341
status = "disabled";
341342
};
343+
344+
pwm0: pwm0@40078000 {
345+
compatible = "renesas,ra-pwm";
346+
divider = <RA_PWM_SOURCE_DIV_1>;
347+
channel = <RA_PWM_CHANNEL_0>;
348+
clocks = <&pclkd MSTPD 5>;
349+
reg = <0x40078000 0x100>;
350+
#pwm-cells = <3>;
351+
status = "disabled";
352+
};
342353
};
343354
};
344355

‎dts/arm/renesas/ra/ra4/r7fa4m2ax.dtsi‎

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Original file line numberDiff line numberDiff line change
@@ -6,6 +6,7 @@
66

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#include <arm/renesas/ra/ra4/ra4-cm33-common.dtsi>
88
#include <zephyr/dt-bindings/clock/ra_clock.h>
9+
#include <zephyr/dt-bindings/pwm/ra_pwm.h>
910

1011
/delete-node/ &spi1;
1112

@@ -98,6 +99,46 @@
9899
channel-count = <13>;
99100
channel-available-mask = <0x139ff>;
100101
};
102+
103+
pwm2: pwm2@40169200 {
104+
compatible = "renesas,ra-pwm";
105+
divider = <RA_PWM_SOURCE_DIV_1>;
106+
channel = <RA_PWM_CHANNEL_2>;
107+
clocks = <&pclkd MSTPE 29>;
108+
reg = <0x40169200 0x100>;
109+
#pwm-cells = <3>;
110+
status = "disabled";
111+
};
112+
113+
pwm3: pwm3@40169300 {
114+
compatible = "renesas,ra-pwm";
115+
divider = <RA_PWM_SOURCE_DIV_1>;
116+
channel = <RA_PWM_CHANNEL_3>;
117+
clocks = <&pclkd MSTPE 28>;
118+
reg = <0x40169300 0x100>;
119+
#pwm-cells = <3>;
120+
status = "disabled";
121+
};
122+
123+
pwm6: pwm6@40169600 {
124+
compatible = "renesas,ra-pwm";
125+
divider = <RA_PWM_SOURCE_DIV_1>;
126+
channel = <RA_PWM_CHANNEL_6>;
127+
clocks = <&pclkd MSTPE 25>;
128+
reg = <0x40169600 0x100>;
129+
#pwm-cells = <3>;
130+
status = "disabled";
131+
};
132+
133+
pwm7: pwm7@40169700 {
134+
compatible = "renesas,ra-pwm";
135+
divider = <RA_PWM_SOURCE_DIV_1>;
136+
channel = <RA_PWM_CHANNEL_7>;
137+
clocks = <&pclkd MSTPE 24>;
138+
reg = <0x40169700 0x100>;
139+
#pwm-cells = <3>;
140+
status = "disabled";
141+
};
101142
};
102143

103144
clocks: clocks {

‎dts/arm/renesas/ra/ra4/r7fa4m3ax.dtsi‎

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@@ -6,6 +6,7 @@
66

77
#include <arm/renesas/ra/ra4/ra4-cm33-common.dtsi>
88
#include <zephyr/dt-bindings/clock/ra_clock.h>
9+
#include <zephyr/dt-bindings/pwm/ra_pwm.h>
910

1011
/delete-node/ &spi1;
1112

@@ -111,6 +112,46 @@
111112
channel-count = <10>;
112113
channel-available-mask = <0x7f0007>;
113114
};
115+
116+
pwm2: pwm2@40169200 {
117+
compatible = "renesas,ra-pwm";
118+
divider = <RA_PWM_SOURCE_DIV_1>;
119+
channel = <RA_PWM_CHANNEL_2>;
120+
clocks = <&pclkd MSTPE 29>;
121+
reg = <0x40169200 0x100>;
122+
#pwm-cells = <3>;
123+
status = "disabled";
124+
};
125+
126+
pwm3: pwm3@40169300 {
127+
compatible = "renesas,ra-pwm";
128+
divider = <RA_PWM_SOURCE_DIV_1>;
129+
channel = <RA_PWM_CHANNEL_3>;
130+
clocks = <&pclkd MSTPE 28>;
131+
reg = <0x40169300 0x100>;
132+
#pwm-cells = <3>;
133+
status = "disabled";
134+
};
135+
136+
pwm6: pwm6@40169600 {
137+
compatible = "renesas,ra-pwm";
138+
divider = <RA_PWM_SOURCE_DIV_1>;
139+
channel = <RA_PWM_CHANNEL_6>;
140+
clocks = <&pclkd MSTPE 25>;
141+
reg = <0x40169600 0x100>;
142+
#pwm-cells = <3>;
143+
status = "disabled";
144+
};
145+
146+
pwm7: pwm7@40169700 {
147+
compatible = "renesas,ra-pwm";
148+
divider = <RA_PWM_SOURCE_DIV_1>;
149+
channel = <RA_PWM_CHANNEL_7>;
150+
clocks = <&pclkd MSTPE 24>;
151+
reg = <0x40169700 0x100>;
152+
#pwm-cells = <3>;
153+
status = "disabled";
154+
};
114155
};
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116157
clocks: clocks {

‎dts/arm/renesas/ra/ra4/r7fa4w1ad2cng.dtsi‎

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Original file line numberDiff line numberDiff line change
@@ -6,6 +6,7 @@
66

77
#include <zephyr/dt-bindings/clock/ra_clock.h>
88
#include <arm/renesas/ra/ra4/ra4-cm4-common.dtsi>
9+
#include <zephyr/dt-bindings/pwm/ra_pwm.h>
910

1011
/delete-node/ &adc1;
1112

@@ -53,6 +54,16 @@
5354
channel-count = <8>;
5455
channel-available-mask = <0x1a0670>;
5556
};
57+
58+
pwm8: pwm8@40169800 {
59+
compatible = "renesas,ra-pwm";
60+
divider = <RA_PWM_SOURCE_DIV_1>;
61+
channel = <RA_PWM_CHANNEL_8>;
62+
clocks = <&pclkd MSTPD 6>;
63+
reg = <0x40169800 0x100>;
64+
#pwm-cells = <3>;
65+
status = "disabled";
66+
};
5667
};
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5869
clocks: clocks {

‎dts/arm/renesas/ra/ra4/ra4-cm33-common.dtsi‎

Lines changed: 41 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -7,6 +7,7 @@
77
#include <mem.h>
88
#include <arm/armv8-m.dtsi>
99
#include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-ra.h>
10+
#include <zephyr/dt-bindings/pwm/ra_pwm.h>
1011
#include <freq.h>
1112

1213
/ {
@@ -431,6 +432,46 @@
431432
#port-irq-cells = <0>;
432433
status = "disabled";
433434
};
435+
436+
pwm0: pwm0@40169000 {
437+
compatible = "renesas,ra-pwm";
438+
divider = <RA_PWM_SOURCE_DIV_1>;
439+
channel = <RA_PWM_CHANNEL_0>;
440+
clocks = <&pclkd MSTPE 31>;
441+
reg = <0x40169000 0x100>;
442+
#pwm-cells = <3>;
443+
status = "disabled";
444+
};
445+
446+
pwm1: pwm1@40169100 {
447+
compatible = "renesas,ra-pwm";
448+
divider = <RA_PWM_SOURCE_DIV_1>;
449+
channel = <RA_PWM_CHANNEL_1>;
450+
clocks = <&pclkd MSTPE 30>;
451+
reg = <0x40169100 0x100>;
452+
#pwm-cells = <3>;
453+
status = "disabled";
454+
};
455+
456+
pwm4: pwm4@40169400 {
457+
compatible = "renesas,ra-pwm";
458+
divider = <RA_PWM_SOURCE_DIV_1>;
459+
channel = <RA_PWM_CHANNEL_4>;
460+
clocks = <&pclkd MSTPE 27>;
461+
reg = <0x40169400 0x100>;
462+
#pwm-cells = <3>;
463+
status = "disabled";
464+
};
465+
466+
pwm5: pwm5@40169500 {
467+
compatible = "renesas,ra-pwm";
468+
divider = <RA_PWM_SOURCE_DIV_1>;
469+
channel = <RA_PWM_CHANNEL_5>;
470+
clocks = <&pclkd MSTPE 26>;
471+
reg = <0x40169500 0x100>;
472+
#pwm-cells = <3>;
473+
status = "disabled";
474+
};
434475
};
435476
};
436477

‎dts/arm/renesas/ra/ra4/ra4-cm4-common.dtsi‎

Lines changed: 61 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -7,6 +7,7 @@
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#include <mem.h>
88
#include <arm/armv7-m.dtsi>
99
#include <zephyr/dt-bindings/pinctrl/renesas/pinctrl-ra.h>
10+
#include <zephyr/dt-bindings/pwm/ra_pwm.h>
1011
#include <freq.h>
1112

1213
/ {
@@ -333,6 +334,66 @@
333334
#port-irq-cells = <0>;
334335
status = "disabled";
335336
};
337+
338+
pwm0: pwm0@40169000 {
339+
compatible = "renesas,ra-pwm";
340+
divider = <RA_PWM_SOURCE_DIV_1>;
341+
channel = <RA_PWM_CHANNEL_0>;
342+
clocks = <&pclkd MSTPD 5>;
343+
reg = <0x40169000 0x100>;
344+
#pwm-cells = <3>;
345+
status = "disabled";
346+
};
347+
348+
pwm1: pwm1@40169100 {
349+
compatible = "renesas,ra-pwm";
350+
divider = <RA_PWM_SOURCE_DIV_1>;
351+
channel = <RA_PWM_CHANNEL_1>;
352+
clocks = <&pclkd MSTPD 5>;
353+
reg = <0x40169100 0x100>;
354+
#pwm-cells = <3>;
355+
status = "disabled";
356+
};
357+
358+
pwm2: pwm2@40169200 {
359+
compatible = "renesas,ra-pwm";
360+
divider = <RA_PWM_SOURCE_DIV_1>;
361+
channel = <RA_PWM_CHANNEL_2>;
362+
clocks = <&pclkd MSTPD 5>;
363+
reg = <0x40169200 0x100>;
364+
#pwm-cells = <3>;
365+
status = "disabled";
366+
};
367+
368+
pwm3: pwm3@40169300 {
369+
compatible = "renesas,ra-pwm";
370+
divider = <RA_PWM_SOURCE_DIV_1>;
371+
channel = <RA_PWM_CHANNEL_3>;
372+
clocks = <&pclkd MSTPD 5>;
373+
reg = <0x40169300 0x100>;
374+
#pwm-cells = <3>;
375+
status = "disabled";
376+
};
377+
378+
pwm4: pwm4@40169400 {
379+
compatible = "renesas,ra-pwm";
380+
divider = <RA_PWM_SOURCE_DIV_1>;
381+
channel = <RA_PWM_CHANNEL_4>;
382+
clocks = <&pclkd MSTPD 5>;
383+
reg = <0x40169400 0x100>;
384+
#pwm-cells = <3>;
385+
status = "disabled";
386+
};
387+
388+
pwm5: pwm5@40169500 {
389+
compatible = "renesas,ra-pwm";
390+
divider = <RA_PWM_SOURCE_DIV_1>;
391+
channel = <RA_PWM_CHANNEL_5>;
392+
clocks = <&pclkd MSTPD 6>;
393+
reg = <0x40169500 0x100>;
394+
#pwm-cells = <3>;
395+
status = "disabled";
396+
};
336397
};
337398
};
338399

‎dts/arm/renesas/ra/ra6/r7fa6e10x.dtsi‎

Lines changed: 21 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -6,6 +6,7 @@
66

77
#include <arm/renesas/ra/ra6/ra6-cm33-common.dtsi>
88
#include <zephyr/dt-bindings/clock/ra_clock.h>
9+
#include <zephyr/dt-bindings/pwm/ra_pwm.h>
910

1011
/delete-node/ &adc1;
1112

@@ -96,6 +97,26 @@
9697
channel-count = <11>;
9798
channel-available-mask = <0x31ff>;
9899
};
100+
101+
pwm6: pwm6@40169600 {
102+
compatible = "renesas,ra-pwm";
103+
divider = <RA_PWM_SOURCE_DIV_1>;
104+
channel = <RA_PWM_CHANNEL_6>;
105+
clocks = <&pclkd MSTPE 25>;
106+
reg = <0x40169600 0x100>;
107+
#pwm-cells = <3>;
108+
status = "disabled";
109+
};
110+
111+
pwm7: pwm7@40169700 {
112+
compatible = "renesas,ra-pwm";
113+
divider = <RA_PWM_SOURCE_DIV_1>;
114+
channel = <RA_PWM_CHANNEL_7>;
115+
clocks = <&pclkd MSTPE 24>;
116+
reg = <0x40169700 0x100>;
117+
#pwm-cells = <3>;
118+
status = "disabled";
119+
};
99120
};
100121

101122
clocks: clocks {

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