Skip to content

Commit f796999

Browse files
heronetjhedberg
heronet
authored and
jhedberg
committed
boards: add WeAct Studio ESP32-S3-B board support
Add support for WeAct Studio ESP32-S3-B development board featuring: - ESP32-S3R8 chip with 8MB integrated PSRAM - 16MB external SPI flash - RGB WS2812 LED on GPIO48 - User button on GPIO45 - Dual USB-C connectors - Wi-Fi and Bluetooth LE support Signed-off-by: Siratul Islam <[email protected]>
1 parent 5a588f1 commit f796999

15 files changed

+570
-0
lines changed

‎boards/weact/weact_esp32s3_b/Kconfig‎

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,8 @@
1+
# Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd.
2+
# Copyright (c) 2025 Siratul Islam <[email protected]>
3+
# SPDX-License-Identifier: Apache-2.0
4+
5+
config HEAP_MEM_POOL_ADD_SIZE_BOARD
6+
int
7+
default 4096 if BOARD_WEACT_ESP32S3_B_ESP32S3_PROCPU
8+
default 256 if BOARD_WEACT_ESP32S3_B_ESP32S3_APPCPU

‎boards/weact/weact_esp32s3_b/Kconfig.sysbuild‎

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,11 @@
1+
# Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd.
2+
# Copyright (c) 2025 Siratul Islam <[email protected]>
3+
# SPDX-License-Identifier: Apache-2.0
4+
5+
choice BOOTLOADER
6+
default BOOTLOADER_MCUBOOT
7+
endchoice
8+
9+
choice BOOT_SIGNATURE_TYPE
10+
default BOOT_SIGNATURE_TYPE_NONE
11+
endchoice

‎boards/weact/weact_esp32s3_b/Kconfig.weact_esp32s3_b‎

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,8 @@
1+
# Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd.
2+
# Copyright (c) 2025 Siratul Islam <[email protected]>
3+
# SPDX-License-Identifier: Apache-2.0
4+
5+
config BOARD_WEACT_ESP32S3_B
6+
select SOC_ESP32S3_WROOM_N8
7+
select SOC_ESP32S3_PROCPU if BOARD_WEACT_ESP32S3_B_ESP32S3_PROCPU
8+
select SOC_ESP32S3_APPCPU if BOARD_WEACT_ESP32S3_B_ESP32S3_APPCPU

‎boards/weact/weact_esp32s3_b/board.cmake‎

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,9 @@
1+
# SPDX-License-Identifier: Apache-2.0
2+
3+
if(NOT "${OPENOCD}" MATCHES "^${ESPRESSIF_TOOLCHAIN_PATH}/.*")
4+
set(OPENOCD OPENOCD-NOTFOUND)
5+
endif()
6+
find_program(OPENOCD openocd PATHS ${ESPRESSIF_TOOLCHAIN_PATH}/openocd-esp32/bin NO_DEFAULT_PATH)
7+
8+
include(${ZEPHYR_BASE}/boards/common/esp32.board.cmake)
9+
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)

‎boards/weact/weact_esp32s3_b/board.yml‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,6 @@
1+
board:
2+
name: weact_esp32s3_b
3+
full_name: WeAct Studio ESP32-S3-B
4+
vendor: weact
5+
socs:
6+
- name: esp32s3

‎boards/weact/weact_esp32s3_b/doc/img/weact_esp32s3_b.webp‎

42.6 KB
Loading

‎boards/weact/weact_esp32s3_b/doc/index.rst‎

Lines changed: 126 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,126 @@
1+
.. zephyr:board:: weact_esp32s3_b
2+
3+
Overview
4+
********
5+
6+
The WeAct Studio ESP32-S3-B is a compact development board equipped with ESP32-S3R8
7+
chip and 16MB external flash memory. This board integrates complete Wi-Fi
8+
and Bluetooth Low Energy functions with additional features including an onboard RGB WS2812 LED
9+
and user button. For more information, check `WeAct Studio ESP32-S3-B`_.
10+
11+
Hardware
12+
********
13+
14+
ESP32-S3 is a low-power MCU-based system on a chip (SoC) with integrated 2.4 GHz Wi-Fi
15+
and Bluetooth® Low Energy (Bluetooth LE). It consists of high-performance dual-core microprocessor
16+
(Xtensa® 32-bit LX7), a low power coprocessor, a Wi-Fi baseband, a Bluetooth LE baseband,
17+
RF module, and numerous peripherals.
18+
19+
WeAct Studio ESP32-S3-B includes the following features:
20+
21+
- Dual core 32-bit Xtensa Microprocessor (Tensilica LX7), running up to 240MHz
22+
- Additional vector instructions support for AI acceleration
23+
- 16MB external Flash memory (separate chip)
24+
- 8MB integrated PSRAM (ESP32-S3R8 chip)
25+
- 512KB of SRAM
26+
- 384KB of ROM
27+
- Wi-Fi 802.11b/g/n
28+
- Bluetooth LE 5.0 with long-range support and up to 2Mbps data rate
29+
- Onboard RGB WS2812 LED (GPIO48)
30+
- User button (GPIO45)
31+
- BOOT button (GPIO0)
32+
33+
Digital interfaces:
34+
35+
- 45 programmable GPIOs
36+
- 4x SPI
37+
- 1x LCD interface (8-bit ~16-bit parallel RGB, I8080 and MOTO6800), supporting conversion between RGB565, YUV422, YUV420 and YUV411
38+
- 1x DVP 8-bit ~16-bit camera interface
39+
- 3x UART
40+
- 2x I2C
41+
- 2x I2S
42+
- 1x RMT (TX/RX)
43+
- 1x pulse counter
44+
- LED PWM controller, up to 8 channels
45+
- 1x full-speed USB OTG
46+
- 1x USB Serial/JTAG controller
47+
- 2x MCPWM
48+
- 1x SDIO host controller with 2 slots
49+
- General DMA controller (GDMA), with 5 transmit channels and 5 receive channels
50+
- 1x TWAI® controller, compatible with ISO 11898-1 (CAN Specification 2.0)
51+
52+
Analog interfaces:
53+
54+
- 2x 12-bit SAR ADCs, up to 20 channels
55+
- 1x temperature sensor
56+
- 14x touch sensing IOs
57+
58+
Timers:
59+
60+
- 4x 54-bit general-purpose timers
61+
- 1x 52-bit system timer
62+
- 3x watchdog timers
63+
64+
Low Power:
65+
66+
- Power Management Unit with five power modes
67+
- Ultra-Low-Power (ULP) coprocessors: ULP-RISC-V and ULP-FSM
68+
69+
Security:
70+
71+
- Secure boot
72+
- Flash encryption
73+
- 4-Kbit OTP, up to 1792 bits for users
74+
- Cryptographic hardware acceleration: (AES-128/256, Hash, RSA, RNG, HMAC, Digital signature)
75+
76+
Asymmetric Multiprocessing (AMP)
77+
********************************
78+
79+
WeAct Studio ESP32-S3-B allows 2 different applications to be executed in ESP32-S3 SoC. Due to its dual-core
80+
architecture, each core can be enabled to execute customized tasks in stand-alone mode
81+
and/or exchanging data over OpenAMP framework. See :zephyr:code-sample-category:`ipc` folder as code reference.
82+
83+
For more information, check the datasheet at `ESP32-S3 Datasheet`_ or the technical reference
84+
manual at `ESP32-S3 Technical Reference Manual`_.
85+
86+
Supported Features
87+
==================
88+
89+
.. zephyr:board-supported-hw::
90+
91+
System Requirements
92+
*******************
93+
94+
Espressif HAL requires WiFi and Bluetooth binary blobs in order work. Run the command
95+
below to retrieve those files.
96+
97+
.. code-block:: console
98+
99+
west blobs fetch hal_espressif
100+
101+
.. note::
102+
103+
It is recommended running the command above after :file:`west update`.
104+
105+
Programming and Debugging
106+
*************************
107+
108+
.. zephyr:board-supported-runners::
109+
110+
.. include:: ../../../espressif/common/building-flashing.rst
111+
:start-after: espressif-building-flashing
112+
113+
Debugging
114+
=========
115+
116+
.. include:: ../../../espressif/common/openocd-debugging.rst
117+
:start-after: espressif-openocd-debugging
118+
119+
References
120+
**********
121+
122+
.. target-notes::
123+
124+
.. _`WeAct Studio ESP32-S3-B`: https://github.com/WeActStudio/WeActStudio.ESP32S3-AorB
125+
.. _`ESP32-S3 Datasheet`: https://www.espressif.com/sites/default/files/documentation/esp32-s3-wroom-1_wroom-1u_datasheet_en.pdf
126+
.. _`ESP32-S3 Technical Reference Manual`: https://www.espressif.com/sites/default/files/documentation/esp32-s3_technical_reference_manual_en.pdf

‎boards/weact/weact_esp32s3_b/support/openocd.cfg‎

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,7 @@
1+
set ESP_RTOS none
2+
set ESP32_ONLYCPU 1
3+
4+
# Source the JTAG interface configuration file
5+
source [find interface/esp_usb_jtag.cfg]
6+
# Source the ESP32-S3 configuration file
7+
source [find target/esp32s3.cfg]

‎boards/weact/weact_esp32s3_b/weact_esp32s3_b-pinctrl.dtsi‎

Lines changed: 124 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,124 @@
1+
/*
2+
* Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd.
3+
* Copyright (c) 2025 Siratul Islam <[email protected]>
4+
*
5+
* SPDX-License-Identifier: Apache-2.0
6+
*/
7+
8+
#include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
9+
#include <dt-bindings/pinctrl/esp32s3-pinctrl.h>
10+
#include <zephyr/dt-bindings/pinctrl/esp32s3-gpio-sigmap.h>
11+
12+
&pinctrl {
13+
uart0_default: uart0_default {
14+
group1 {
15+
pinmux = <UART0_TX_GPIO43>;
16+
output-high;
17+
};
18+
19+
group2 {
20+
pinmux = <UART0_RX_GPIO44>;
21+
bias-pull-up;
22+
};
23+
};
24+
25+
uart1_default: uart1_default {
26+
group1 {
27+
pinmux = <UART1_TX_GPIO17>;
28+
output-high;
29+
};
30+
31+
group2 {
32+
pinmux = <UART1_RX_GPIO18>;
33+
bias-pull-up;
34+
};
35+
};
36+
37+
i2c0_default: i2c0_default {
38+
group1 {
39+
pinmux = <I2C0_SDA_GPIO1>,
40+
<I2C0_SCL_GPIO2>;
41+
bias-pull-up;
42+
drive-open-drain;
43+
output-high;
44+
};
45+
};
46+
47+
i2c1_default: i2c1_default {
48+
group1 {
49+
pinmux = <I2C1_SDA_GPIO4>,
50+
<I2C1_SCL_GPIO5>;
51+
bias-pull-up;
52+
drive-open-drain;
53+
output-high;
54+
};
55+
};
56+
57+
i2s0_default: i2s0_default {
58+
group1 {
59+
pinmux = <I2S0_MCLK_GPIO4>,
60+
<I2S0_O_WS_GPIO5>,
61+
<I2S0_O_BCK_GPIO6>,
62+
<I2S0_O_SD_GPIO7>,
63+
<I2S0_I_WS_GPIO15>,
64+
<I2S0_I_BCK_GPIO16>,
65+
<I2S0_O_SD_GPIO48>;
66+
output-enable;
67+
};
68+
69+
group2 {
70+
pinmux = <I2S0_I_SD_GPIO17>;
71+
input-enable;
72+
};
73+
};
74+
75+
i2s1_default: i2s1_default {
76+
group1 {
77+
pinmux = <I2S1_MCLK_GPIO18>,
78+
<I2S1_O_WS_GPIO8>,
79+
<I2S1_O_BCK_GPIO3>,
80+
<I2S1_O_SD_GPIO9>,
81+
<I2S1_I_WS_GPIO10>,
82+
<I2S1_I_BCK_GPIO11>;
83+
output-enable;
84+
};
85+
86+
group2 {
87+
pinmux = <I2S1_I_SD_GPIO12>;
88+
input-enable;
89+
};
90+
};
91+
92+
spim2_default: spim2_default {
93+
group1 {
94+
pinmux = <SPIM2_MISO_GPIO13>,
95+
<SPIM2_SCLK_GPIO12>,
96+
<SPIM2_CSEL_GPIO10>;
97+
};
98+
99+
group2 {
100+
pinmux = <SPIM2_MOSI_GPIO11>;
101+
output-low;
102+
};
103+
};
104+
105+
spim3_default: spim3_default {
106+
group1 {
107+
pinmux = <SPIM3_MISO_GPIO37>,
108+
<SPIM3_SCLK_GPIO36>,
109+
<SPIM3_CSEL_GPIO38>;
110+
};
111+
112+
group2 {
113+
pinmux = <SPIM3_MOSI_GPIO39>;
114+
output-low;
115+
};
116+
};
117+
118+
twai_default: twai_default {
119+
group1 {
120+
pinmux = <TWAI_TX_GPIO5>,
121+
<TWAI_RX_GPIO6>;
122+
};
123+
};
124+
};

‎boards/weact/weact_esp32s3_b/weact_esp32s3_b_appcpu.dts‎

Lines changed: 32 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,32 @@
1+
/*
2+
* Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd.
3+
* Copyright (c) 2025 Siratul Islam <[email protected]>
4+
*
5+
* SPDX-License-Identifier: Apache-2.0
6+
*/
7+
/dts-v1/;
8+
9+
#include <espressif/esp32s3/esp32s3_wroom_n16r8.dtsi>
10+
#include <espressif/partitions_0x0_amp_16M.dtsi>
11+
#include "weact_esp32s3_b-pinctrl.dtsi"
12+
13+
/ {
14+
model = "WeAct Studio ESP32-S3-B APPCPU";
15+
compatible = "espressif,esp32s3";
16+
17+
chosen {
18+
zephyr,sram = &sram1;
19+
zephyr,ipc_shm = &shm0;
20+
zephyr,ipc = &ipm0;
21+
zephyr,flash = &flash0;
22+
zephyr,code-partition = &slot0_appcpu_partition;
23+
};
24+
};
25+
26+
&trng0 {
27+
status = "okay";
28+
};
29+
30+
&ipm0 {
31+
status = "okay";
32+
};

0 commit comments

Comments
 (0)