Skip to content

Commit f836502

Browse files
committed
drivers: video: ov2640 driver: code formatting
Signed-off-by: Roman Pustobaiev <[email protected]>
1 parent 32e59bc commit f836502

File tree

1 file changed

+30
-32
lines changed

1 file changed

+30
-32
lines changed

drivers/video/ov2640.c

Lines changed: 30 additions & 32 deletions
Original file line numberDiff line numberDiff line change
@@ -428,60 +428,59 @@ static const struct ov2640_reg default_regs[] = {
428428
};
429429

430430
static const struct ov2640_reg uxga_regs[] = {
431-
{ BANK_SEL, BANK_SEL_SENSOR },
431+
{BANK_SEL, BANK_SEL_SENSOR},
432432
/* DSP input image resolution and window size control */
433-
{ COM7, COM7_RES_UXGA},
434-
{ COM1, 0x0F }, /* UXGA=0x0F, SVGA=0x0A, CIF=0x06 */
435-
{ REG32, REG32_UXGA }, /* UXGA=0x36, SVGA/CIF=0x09 */
436-
437-
{ HSTART, 0x11 }, /* UXGA=0x11, SVGA/CIF=0x11 */
438-
{ HSTOP, 0x75 }, /* UXGA=0x75, SVGA/CIF=0x43 */
439-
440-
{ VSTART, 0x01 }, /* UXGA=0x01, SVGA/CIF=0x00 */
441-
{ VSTOP, 0x97 }, /* UXGA=0x97, SVGA/CIF=0x4b */
442-
{ 0x3d, 0x34 }, /* UXGA=0x34, SVGA/CIF=0x38 */
443-
444-
{ 0x35, 0x88 },
445-
{ 0x22, 0x0a },
446-
{ 0x37, 0x40 },
447-
{ 0x34, 0xa0 },
448-
{ 0x06, 0x02 },
449-
{ 0x0d, 0xb7 },
450-
{ 0x0e, 0x01 },
451-
{ 0x42, 0x83 },
433+
{COM7, COM7_RES_UXGA},
434+
{COM1, 0x0F}, /* UXGA=0x0F, SVGA=0x0A, CIF=0x06 */
435+
{REG32, REG32_UXGA}, /* UXGA=0x36, SVGA/CIF=0x09 */
436+
437+
{HSTART, 0x11}, /* UXGA=0x11, SVGA/CIF=0x11 */
438+
{HSTOP, 0x75}, /* UXGA=0x75, SVGA/CIF=0x43 */
439+
440+
{VSTART, 0x01}, /* UXGA=0x01, SVGA/CIF=0x00 */
441+
{VSTOP, 0x97}, /* UXGA=0x97, SVGA/CIF=0x4b */
442+
{0x3d, 0x34}, /* UXGA=0x34, SVGA/CIF=0x38 */
443+
444+
{0x35, 0x88},
445+
{0x22, 0x0a},
446+
{0x37, 0x40},
447+
{0x34, 0xa0},
448+
{0x06, 0x02},
449+
{0x0d, 0xb7},
450+
{0x0e, 0x01},
451+
{0x42, 0x83},
452452

453453
/*
454454
* Set DSP input image size and offset.
455455
* The sensor output image can be scaled with OUTW/OUTH
456456
*/
457-
{ BANK_SEL, BANK_SEL_DSP },
458-
{ R_BYPASS, R_BYPASS_DSP_BYPAS },
457+
{BANK_SEL, BANK_SEL_DSP},
458+
{R_BYPASS, R_BYPASS_DSP_BYPAS},
459459

460-
{ RESET, RESET_DVP },
460+
{RESET, RESET_DVP},
461461
{HSIZE8, (UXGA_WIDTH >> 3)}, /* Image Horizontal Size HSIZE[10:3] */
462462
{VSIZE8, (UXGA_HEIGHT >> 3)}, /* Image Vertical Size VSIZE[10:3] */
463463

464464
/* {HSIZE[11], HSIZE[2:0], VSIZE[2:0]} */
465465
{SIZEL, ((UXGA_WIDTH >> 6) & 0x40) | ((UXGA_WIDTH & 0x7) << 3) | (UXGA_HEIGHT & 0x7)},
466466

467-
{ XOFFL, 0x00 }, /* OFFSET_X[7:0] */
468-
{ YOFFL, 0x00 }, /* OFFSET_Y[7:0] */
467+
{XOFFL, 0x00}, /* OFFSET_X[7:0] */
468+
{YOFFL, 0x00}, /* OFFSET_Y[7:0] */
469469
{HSIZE, ((UXGA_WIDTH >> 2) & 0xFF)}, /* H_SIZE[7:0] real/4 */
470470
{VSIZE, ((UXGA_HEIGHT >> 2) & 0xFF)}, /* V_SIZE[7:0] real/4 */
471471

472472
/* V_SIZE[8]/OFFSET_Y[10:8]/H_SIZE[8]/OFFSET_X[10:8] */
473473
{VHYX, ((UXGA_HEIGHT >> 3) & 0x80) | ((UXGA_WIDTH >> 7) & 0x08)},
474474
{TEST, (UXGA_WIDTH >> 4) & 0x80}, /* H_SIZE[9] */
475475

476-
{ CTRL2, CTRL2_DCW_EN | CTRL2_SDE_EN |
477-
CTRL2_UV_AVG_EN | CTRL2_CMX_EN | CTRL2_UV_ADJ_EN },
476+
{CTRL2, CTRL2_DCW_EN | CTRL2_SDE_EN | CTRL2_UV_AVG_EN | CTRL2_CMX_EN | CTRL2_UV_ADJ_EN},
478477

479478
/* H_DIVIDER/V_DIVIDER */
480-
{ CTRLI, CTRLI_LP_DP | 0x00},
479+
{CTRLI, CTRLI_LP_DP | 0x00},
481480
/* DVP prescaler */
482-
{ R_DVP_SP, R_DVP_SP_AUTO_MODE | 0x04},
481+
{R_DVP_SP, R_DVP_SP_AUTO_MODE | 0x04},
483482

484-
{ R_BYPASS, R_BYPASS_DSP_EN },
483+
{R_BYPASS, R_BYPASS_DSP_EN},
485484
{0, 0},
486485
};
487486

@@ -869,8 +868,7 @@ static const struct ov2640_win_size *ov2640_select_win(uint32_t width, uint32_t
869868
return NULL;
870869
}
871870

872-
static int ov2640_set_resolution(const struct device *dev,
873-
uint16_t img_width, uint16_t img_height)
871+
static int ov2640_set_resolution(const struct device *dev, uint16_t img_width, uint16_t img_height)
874872
{
875873
int ret = 0;
876874
const struct ov2640_config *cfg = dev->config;

0 commit comments

Comments
 (0)