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6 | 6 |
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7 | 7 | #include <arm/armv7-m.dtsi> |
8 | 8 | #include <dt-bindings/gpio/gpio.h> |
| 9 | +#include <dt-bindings/pwm/pwm.h> |
9 | 10 |
|
10 | 11 | / { |
11 | 12 | cpus { |
|
168 | 169 | }; |
169 | 170 | }; |
170 | 171 |
|
| 172 | + timer0: timer@40012c00 { |
| 173 | + compatible = "gd,gd32-timer"; |
| 174 | + reg = <0x40012c00 0x400>; |
| 175 | + interrupts = <24 0>, <25 0>, <26 0>, <27 0>; |
| 176 | + interrupt-names = "brk", "up", "trgcom", "cc"; |
| 177 | + rcu-periph-clock = <0x60b>; |
| 178 | + rcu-periph-reset = <0x30b>; |
| 179 | + is-advanced; |
| 180 | + channels = <4>; |
| 181 | + status = "disabled"; |
| 182 | + label = "TIMER_0"; |
| 183 | + |
| 184 | + pwm { |
| 185 | + compatible = "gd,gd32-pwm"; |
| 186 | + status = "disabled"; |
| 187 | + label = "PWM_0"; |
| 188 | + #pwm-cells = <2>; |
| 189 | + }; |
| 190 | + }; |
| 191 | + |
| 192 | + timer1: timer@40000000 { |
| 193 | + compatible = "gd,gd32-timer"; |
| 194 | + reg = <0x40000000 0x400>; |
| 195 | + interrupts = <28 0>; |
| 196 | + interrupt-names = "global"; |
| 197 | + rcu-periph-clock = <0x700>; |
| 198 | + rcu-periph-reset = <0x400>; |
| 199 | + channels = <4>; |
| 200 | + status = "disabled"; |
| 201 | + label = "TIMER_1"; |
| 202 | + |
| 203 | + pwm { |
| 204 | + compatible = "gd,gd32-pwm"; |
| 205 | + status = "disabled"; |
| 206 | + label = "PWM_1"; |
| 207 | + #pwm-cells = <2>; |
| 208 | + }; |
| 209 | + }; |
| 210 | + |
| 211 | + timer2: timer@40000400 { |
| 212 | + compatible = "gd,gd32-timer"; |
| 213 | + reg = <0x40000400 0x400>; |
| 214 | + interrupts = <29 0>; |
| 215 | + interrupt-names = "global"; |
| 216 | + rcu-periph-clock = <0x701>; |
| 217 | + rcu-periph-reset = <0x401>; |
| 218 | + channels = <4>; |
| 219 | + status = "disabled"; |
| 220 | + label = "TIMER_2"; |
| 221 | + |
| 222 | + pwm { |
| 223 | + compatible = "gd,gd32-pwm"; |
| 224 | + status = "disabled"; |
| 225 | + label = "PWM_2"; |
| 226 | + #pwm-cells = <2>; |
| 227 | + }; |
| 228 | + }; |
| 229 | + |
| 230 | + timer3: timer@40000800 { |
| 231 | + compatible = "gd,gd32-timer"; |
| 232 | + reg = <0x40000800 0x400>; |
| 233 | + interrupts = <30 0>; |
| 234 | + interrupt-names = "global"; |
| 235 | + rcu-periph-clock = <0x702>; |
| 236 | + rcu-periph-reset = <0x402>; |
| 237 | + channels = <4>; |
| 238 | + status = "disabled"; |
| 239 | + label = "TIMER_3"; |
| 240 | + |
| 241 | + pwm { |
| 242 | + compatible = "gd,gd32-pwm"; |
| 243 | + status = "disabled"; |
| 244 | + label = "PWM_3"; |
| 245 | + #pwm-cells = <2>; |
| 246 | + }; |
| 247 | + }; |
| 248 | + |
| 249 | + timer4: timer@40000c00 { |
| 250 | + compatible = "gd,gd32-timer"; |
| 251 | + reg = <0x40000c00 0x400>; |
| 252 | + interrupts = <50 0>; |
| 253 | + interrupt-names = "global"; |
| 254 | + rcu-periph-clock = <0x703>; |
| 255 | + rcu-periph-reset = <0x403>; |
| 256 | + channels = <4>; |
| 257 | + status = "disabled"; |
| 258 | + label = "TIMER_4"; |
| 259 | + |
| 260 | + pwm { |
| 261 | + compatible = "gd,gd32-pwm"; |
| 262 | + status = "disabled"; |
| 263 | + label = "PWM_4"; |
| 264 | + #pwm-cells = <2>; |
| 265 | + }; |
| 266 | + }; |
| 267 | + |
| 268 | + timer5: timer@40001000 { |
| 269 | + compatible = "gd,gd32-timer"; |
| 270 | + reg = <0x40001000 0x400>; |
| 271 | + interrupts = <54 0>; |
| 272 | + interrupt-names = "global"; |
| 273 | + rcu-periph-clock = <0x704>; |
| 274 | + rcu-periph-reset = <0x404>; |
| 275 | + channels = <0>; |
| 276 | + status = "disabled"; |
| 277 | + label = "TIMER_5"; |
| 278 | + }; |
| 279 | + |
| 280 | + timer6: timer@40001400 { |
| 281 | + compatible = "gd,gd32-timer"; |
| 282 | + reg = <0x40001400 0x400>; |
| 283 | + interrupts = <55 0>; |
| 284 | + interrupt-names = "global"; |
| 285 | + rcu-periph-clock = <0x705>; |
| 286 | + rcu-periph-reset = <0x405>; |
| 287 | + channels = <0>; |
| 288 | + status = "disabled"; |
| 289 | + label = "TIMER_6"; |
| 290 | + }; |
| 291 | + |
| 292 | + timer7: timer@40013400 { |
| 293 | + compatible = "gd,gd32-timer"; |
| 294 | + reg = <0x40013400 0x400>; |
| 295 | + interrupts = <43 0>, <44 0>, <45 0>, <46 0>; |
| 296 | + interrupt-names = "brk", "up", "trgcom", "cc"; |
| 297 | + rcu-periph-clock = <0x60d>; |
| 298 | + rcu-periph-reset = <0x30d>; |
| 299 | + is-advanced; |
| 300 | + channels = <4>; |
| 301 | + status = "disabled"; |
| 302 | + label = "TIMER_7"; |
| 303 | + |
| 304 | + pwm { |
| 305 | + compatible = "gd,gd32-pwm"; |
| 306 | + status = "disabled"; |
| 307 | + label = "PWM_7"; |
| 308 | + #pwm-cells = <2>; |
| 309 | + }; |
| 310 | + }; |
| 311 | + |
| 312 | + timer8: timer@40014c00 { |
| 313 | + compatible = "gd,gd32-timer"; |
| 314 | + reg = <0x40014c00 0x400>; |
| 315 | + interrupts = <24 0>; |
| 316 | + interrupt-names = "global"; |
| 317 | + rcu-periph-clock = <0x613>; |
| 318 | + rcu-periph-reset = <0x313>; |
| 319 | + channels = <2>; |
| 320 | + status = "disabled"; |
| 321 | + label = "TIMER_8"; |
| 322 | + |
| 323 | + pwm { |
| 324 | + compatible = "gd,gd32-pwm"; |
| 325 | + status = "disabled"; |
| 326 | + label = "PWM_8"; |
| 327 | + #pwm-cells = <2>; |
| 328 | + }; |
| 329 | + }; |
| 330 | + |
| 331 | + timer9: timer@40015000 { |
| 332 | + compatible = "gd,gd32-timer"; |
| 333 | + reg = <0x40015000 0x400>; |
| 334 | + interrupts = <25 0>; |
| 335 | + interrupt-names = "global"; |
| 336 | + rcu-periph-clock = <0x614>; |
| 337 | + rcu-periph-reset = <0x314>; |
| 338 | + channels = <1>; |
| 339 | + status = "disabled"; |
| 340 | + label = "TIMER_9"; |
| 341 | + |
| 342 | + pwm { |
| 343 | + compatible = "gd,gd32-pwm"; |
| 344 | + status = "disabled"; |
| 345 | + label = "PWM_9"; |
| 346 | + #pwm-cells = <2>; |
| 347 | + }; |
| 348 | + }; |
| 349 | + |
| 350 | + timer10: timer@40015400 { |
| 351 | + compatible = "gd,gd32-timer"; |
| 352 | + reg = <0x40015400 0x400>; |
| 353 | + interrupts = <26 0>; |
| 354 | + interrupt-names = "global"; |
| 355 | + rcu-periph-clock = <0x615>; |
| 356 | + rcu-periph-reset = <0x315>; |
| 357 | + channels = <1>; |
| 358 | + status = "disabled"; |
| 359 | + label = "TIMER_10"; |
| 360 | + |
| 361 | + pwm { |
| 362 | + compatible = "gd,gd32-pwm"; |
| 363 | + status = "disabled"; |
| 364 | + label = "PWM_10"; |
| 365 | + #pwm-cells = <2>; |
| 366 | + }; |
| 367 | + }; |
| 368 | + |
| 369 | + timer11: timer@40001800 { |
| 370 | + compatible = "gd,gd32-timer"; |
| 371 | + reg = <0x40001800 0x400>; |
| 372 | + interrupts = <43 0>; |
| 373 | + interrupt-names = "global"; |
| 374 | + rcu-periph-clock = <0x706>; |
| 375 | + rcu-periph-reset = <0x406>; |
| 376 | + channels = <2>; |
| 377 | + status = "disabled"; |
| 378 | + label = "TIMER_11"; |
| 379 | + |
| 380 | + pwm { |
| 381 | + compatible = "gd,gd32-pwm"; |
| 382 | + status = "disabled"; |
| 383 | + label = "PWM_11"; |
| 384 | + #pwm-cells = <2>; |
| 385 | + }; |
| 386 | + }; |
| 387 | + |
| 388 | + timer12: timer@40001c00 { |
| 389 | + compatible = "gd,gd32-timer"; |
| 390 | + reg = <0x40001c00 0x400>; |
| 391 | + interrupts = <44 0>; |
| 392 | + interrupt-names = "global"; |
| 393 | + rcu-periph-clock = <0x707>; |
| 394 | + rcu-periph-reset = <0x402>; |
| 395 | + channels = <1>; |
| 396 | + status = "disabled"; |
| 397 | + label = "TIMER_12"; |
| 398 | + |
| 399 | + pwm { |
| 400 | + compatible = "gd,gd32-pwm"; |
| 401 | + status = "disabled"; |
| 402 | + label = "PWM_12"; |
| 403 | + #pwm-cells = <2>; |
| 404 | + }; |
| 405 | + }; |
| 406 | + |
| 407 | + timer13: timer@40002000 { |
| 408 | + compatible = "gd,gd32-timer"; |
| 409 | + reg = <0x40002000 0x400>; |
| 410 | + interrupts = <45 0>; |
| 411 | + interrupt-names = "global"; |
| 412 | + rcu-periph-clock = <0x708>; |
| 413 | + rcu-periph-reset = <0x408>; |
| 414 | + channels = <1>; |
| 415 | + status = "disabled"; |
| 416 | + label = "TIMER_13"; |
| 417 | + |
| 418 | + pwm { |
| 419 | + compatible = "gd,gd32-pwm"; |
| 420 | + status = "disabled"; |
| 421 | + label = "PWM_13"; |
| 422 | + #pwm-cells = <2>; |
| 423 | + }; |
| 424 | + }; |
| 425 | + |
171 | 426 | }; |
172 | 427 | }; |
173 | 428 |
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