dts: imx8m_m4: add mailbox node for NXP i.MX8Mx SoCs with Cortex M4

Add a device tree node for the messaging unit found on i.MX8Mx SoCs with
a Cortex M4 core.

Signed-off-by: Matthias Fend <[email protected]>

Author: emfend

dts/arm/nxp/nxp_imx8m_m4.dtsi

@@ -173,6 +173,18 @@
 			label = "UART_4";
 			status = "disabled";
 		};
+
+		mailbox0: mailbox@30ab0000 {
+			compatible = "nxp,imx-mu";
+			reg = <0x30ab0000 DT_SIZE_K(64)>;
+			interrupts = <97 0>;
+			label = "MAILBOX_0";
+			rdc = <(RDC_DOMAIN_PERM(A7_DOMAIN_ID,\
+					       RDC_DOMAIN_PERM_RW)|\
+			       RDC_DOMAIN_PERM(M4_DOMAIN_ID,\
+					       RDC_DOMAIN_PERM_RW))>;
+			status = "disabled";
+		};
 	};
 };