dts: nordic: nrf54h20: Fix PPR CLIC address

Between SoC revisions, the address was moved from 0x5F909000 in the
global domain, to 0xF0000000 in PPR's private address space.

Move the corresponding DT node out of `cpuppr_vpr` range to a separate
bus node, which is considered inaccessible to all cores but `cpuppr`.
This is expressed by selectively leaving out the `simple-bus` compatible
and `ranges` property, i.e., they're only set in `nrf54h20_cpuppr.dtsi`.

This lets the interrupt controller node remain visible at system level,
for the purpose of describing IRQ mappings between cores in devicetree.

Signed-off-by: Grzegorz Swiderski <[email protected]>

Author: 57300

dts/common/nordic/nrf54h20.dtsi

@@ -591,7 +591,7 @@
 				cpu = <13>;
 				#address-cells = <1>;
 				#size-cells = <1>;
-				ranges = <0x0 0x908000 0x4000>;
+				ranges = <0x0 0x908000 0x1000>;
 
 				cpuppr_vevif_tx: mailbox@0 {
 					compatible = "nordic,nrf-vevif-task-tx";
@@ -601,15 +601,6 @@
 					nordic,tasks = <16>;
 					nordic,tasks-mask = <0xfffffff0>;
 				};
-
-				cpuppr_clic: interrupt-controller@1000 {
-					compatible = "nordic,nrf-clic";
-					reg = <0x1000 0x3000>;
-					status = "disabled";
-					#interrupt-cells = <2>;
-					interrupt-controller;
-					#address-cells = <1>;
-				};
 			};
 
 			ipct130: ipct@921000 {
@@ -1219,6 +1210,20 @@
 		};
 	};
 
+	cpuppr_private: cpuppr-private-bus {
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		cpuppr_clic: interrupt-controller@f0000000 {
+			compatible = "nordic,nrf-clic";
+			reg = <0xf0000000 0x3000>;
+			status = "disabled";
+			#interrupt-cells = <2>;
+			interrupt-controller;
+			#address-cells = <1>;
+		};
+	};
+
 	cpuflpr_private: cpuflpr-private-bus {
 		#address-cells = <1>;
 		#size-cells = <1>;

dts/riscv/nordic/nrf54h20_cpuppr.dtsi

@@ -30,6 +30,11 @@ cpusys_vevif: &cpusys_vevif_tx {};
 	};
 };
 
+&cpuppr_private {
+	compatible = "simple-bus";
+	ranges;
+};
+
 &cpuppr_clic {
 	status = "okay";
 };