tests/drivers/clock_control: stm32f1: HSI clock is 8MHz

On STM32F series, HSI clock is 8MHz, fix test using 16MHz
and a test name.

Signed-off-by: Erwan Gouriou <[email protected]>

Author: erwango

tests/drivers/clock_control/stm32_clock_configuration/stm32_common/testcase.yaml

@@ -92,12 +92,12 @@ tests:
     extra_args: DTC_OVERLAY_FILE="boards/clear_f0_f1_f3_clocks.overlay;boards/f0_f3_pll_32_hse_8.overlay"
     platform_allow: nucleo_f091rc stm32f3_disco
   drivers.stm32_clock_configuration.common.f1.sysclksrc_hsi_8:
-    extra_args: DTC_OVERLAY_FILE="boards/clear_f0_f1_f3_clocks.overlay;boards/hsi_16.overlay"
+    extra_args: DTC_OVERLAY_FILE="boards/clear_f0_f1_f3_clocks.overlay;boards/hsi_8.overlay"
     platform_allow: nucleo_f103rb
   drivers.stm32_clock_configuration.common.f1.sysclksrc_hse_8:
     extra_args: DTC_OVERLAY_FILE="boards/clear_f0_f1_f3_clocks.overlay;boards/hse_8.overlay"
     platform_allow: nucleo_f103rb
-  drivers.stm32_clock_configuration.common.f1.sysclksrc_pll_64_hsi_16:
+  drivers.stm32_clock_configuration.common.f1.sysclksrc_pll_64_hsi_8:
     extra_args: DTC_OVERLAY_FILE="boards/clear_f0_f1_f3_clocks.overlay;boards/f1_pll_64_hsi_8.overlay"
     platform_allow: nucleo_f103rb
   drivers.stm32_clock_configuration.common.f1.sysclksrc_pll_64_hse_8: