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| 1 | +/* |
| 2 | + * Copyright (c) 2025 Renesas Electronics Corporation |
| 3 | + * |
| 4 | + * SPDX-License-Identifier: Apache-2.0 |
| 5 | + */ |
| 6 | + |
| 7 | +/** |
| 8 | + * @file |
| 9 | + * @brief ArduCam FFC 40-pin camera connector constants. |
| 10 | + * @ingroup arducam-ffc-40pin |
| 11 | + */ |
| 12 | + |
| 13 | +#ifndef INCLUDE_ZEPHYR_DT_BINDINGS_GPIO_ARDUCAM_FFC_40PIN_CONNECTOR_H_ |
| 14 | +#define INCLUDE_ZEPHYR_DT_BINDINGS_GPIO_ARDUCAM_FFC_40PIN_CONNECTOR_H_ |
| 15 | + |
| 16 | +/** |
| 17 | + * @defgroup arducam-ffc-40pin ArduCam FFC 40-pin camera connector. |
| 18 | + * @brief Constants for pins exposed on ArduCam FFC 40-pin camera connector. |
| 19 | + * @ingroup devicetree-gpio-pin-headers |
| 20 | + * @{ |
| 21 | + */ |
| 22 | + |
| 23 | +/** |
| 24 | + * @name MIPI-CSI2 interface pins |
| 25 | + * @{ |
| 26 | + */ |
| 27 | +#define ARDUCAM_FFC_40PIN_MIPI_CSI_DL1_P 5 /**< MIPI‑CSI2 data lane 1 positive */ |
| 28 | +#define ARDUCAM_FFC_40PIN_MIPI_CSI_DL1_N 6 /**< MIPI‑CSI2 data lane 1 negative */ |
| 29 | +#define ARDUCAM_FFC_40PIN_MIPI_CSI_CL_P 8 /**< MIPI‑CSI2 clock lane positive */ |
| 30 | +#define ARDUCAM_FFC_40PIN_MIPI_CSI_CL_N 9 /**< MIPI‑CSI2 clock lane negative */ |
| 31 | +#define ARDUCAM_FFC_40PIN_MIPI_CSI_DL0_P 11 /**< MIPI‑CSI2 data lane 0 positive */ |
| 32 | +#define ARDUCAM_FFC_40PIN_MIPI_CSI_DL0_N 12 /**< MIPI‑CSI2 data lane 0 negative */ |
| 33 | +/** @} */ |
| 34 | + |
| 35 | +/** |
| 36 | + * @name DVP interface pins |
| 37 | + * @{ |
| 38 | + */ |
| 39 | +#define ARDUCAM_FFC_40PIN_D11 2 /**< Parallel port data bit 11 */ |
| 40 | +#define ARDUCAM_FFC_40PIN_D10 3 /**< Parallel port data bit 10 */ |
| 41 | +#define ARDUCAM_FFC_40PIN_D9 5 /**< Parallel port data bit 9 */ |
| 42 | +#define ARDUCAM_FFC_40PIN_D8 6 /**< Parallel port data bit 8 */ |
| 43 | +#define ARDUCAM_FFC_40PIN_D7 8 /**< Parallel port data bit 7 */ |
| 44 | +#define ARDUCAM_FFC_40PIN_D6 9 /**< Parallel port data bit 6 */ |
| 45 | +#define ARDUCAM_FFC_40PIN_D5 11 /**< Parallel port data bit 5 */ |
| 46 | +#define ARDUCAM_FFC_40PIN_D4 12 /**< Parallel port data bit 4 */ |
| 47 | +#define ARDUCAM_FFC_40PIN_D3 14 /**< Parallel port data bit 3 */ |
| 48 | +#define ARDUCAM_FFC_40PIN_D2 15 /**< Parallel port data bit 2 */ |
| 49 | +#define ARDUCAM_FFC_40PIN_D1 17 /**< Parallel port data bit 1 */ |
| 50 | +#define ARDUCAM_FFC_40PIN_D0 18 /**< Parallel port data bit 0 */ |
| 51 | +#define ARDUCAM_FFC_40PIN_VSYNC 23 /**< Vertical sync */ |
| 52 | +#define ARDUCAM_FFC_40PIN_HSYNC 24 /**< Horizontal sync */ |
| 53 | +/** @} */ |
| 54 | + |
| 55 | +/** |
| 56 | + * @name Common pins |
| 57 | + * @{ |
| 58 | + */ |
| 59 | +#define ARDUCAM_FFC_40PIN_SCL 20 /**< I2C clock line */ |
| 60 | +#define ARDUCAM_FFC_40PIN_SDA 21 /**< I2C data line */ |
| 61 | +#define ARDUCAM_FFC_40PIN_RESET 25 /**< Reset */ |
| 62 | +#define ARDUCAM_FFC_40PIN_XCLK 26 /**< External clock */ |
| 63 | +#define ARDUCAM_FFC_40PIN_PCLK 27 /**< Pixel clock */ |
| 64 | +#define ARDUCAM_FFC_40PIN_INT 28 /**< Interrupt from sensor */ |
| 65 | +/** @} */ |
| 66 | + |
| 67 | +/** @} */ |
| 68 | + |
| 69 | +#endif /* INCLUDE_ZEPHYR_DT_BINDINGS_GPIO_ARDUCAM_FFC_40PIN_CONNECTOR_H_ */ |
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