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Raffael Rostagnonashif
Raffael Rostagno
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nashif
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soc: esp32c2: Add support to ESP32C2 and ESP8684
Files for SoC support: ESP32C2 and ESP8684 (same core). Basic device tree configuration. Signed-off-by: Raffael Rostagno <[email protected]>
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‎dts/bindings/cpu/espressif,riscv.yaml

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@@ -28,5 +28,6 @@ properties:
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type: int
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description: Value of the external XTAL connected to ESP32. This is typically 40 MHz.
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enum:
31-
- 40000000
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- 26000000
3232
- 32000000
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- 40000000

‎dts/riscv/espressif/esp32c2/esp32c2.dtsi

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/*
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* Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "esp32c2_common.dtsi"

‎dts/riscv/espressif/esp32c2/esp32c2_common.dtsi

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/*
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* Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <mem.h>
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#include <freq.h>
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#include <zephyr/dt-bindings/adc/adc.h>
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#include <zephyr/dt-bindings/gpio/gpio.h>
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#include <zephyr/dt-bindings/i2c/i2c.h>
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#include <zephyr/dt-bindings/interrupt-controller/esp-esp32c2-intmux.h>
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#include <zephyr/dt-bindings/clock/esp32c2_clock.h>
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#include <dt-bindings/pinctrl/esp32-pinctrl.h>
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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aliases {
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die-temp0 = &coretemp;
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};
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chosen {
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zephyr,entropy = &trng0;
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zephyr,flash-controller = &flash;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "espressif,riscv", "riscv";
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riscv,isa = "rv32imc_zicsr";
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reg = <0>;
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clock-source = <ESP32_CPU_CLK_SRC_PLL>;
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clock-frequency = <DT_FREQ_M(120)>;
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xtal-freq = <DT_FREQ_M(26)>;
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};
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};
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pinctrl: pin-controller {
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compatible = "espressif,esp32-pinctrl";
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status = "okay";
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges;
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sram0: memory@3fc7c000 {
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compatible = "mmio-sram";
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reg = <0x3fc7c000 0x50000>;
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};
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intc: interrupt-controller@600c2000 {
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compatible = "espressif,esp32-intc";
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#address-cells = <0>;
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#interrupt-cells = <1>;
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interrupt-controller;
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reg = <0x600c2000 0x198>;
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status = "okay";
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};
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systimer0: systimer@60023000 {
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compatible = "espressif,esp32-systimer";
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reg = <0x60023000 0x80>;
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interrupts = <SYSTIMER_TARGET0_EDGE_INTR_SOURCE>;
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interrupt-parent = <&intc>;
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status = "okay";
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};
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rtc: rtc@60008000 {
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compatible = "espressif,esp32-rtc";
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reg = <0x60008000 0x1000>;
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fast-clk-src = <ESP32_RTC_FAST_CLK_SRC_RC_FAST>;
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slow-clk-src = <ESP32_RTC_SLOW_CLK_SRC_RC_SLOW>;
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#clock-cells = <1>;
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status = "okay";
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};
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rtc_timer: rtc_timer@60008004 {
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reg = <0x60008004 0xC>;
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compatible = "espressif,esp32-rtc-timer";
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clocks = <&rtc ESP32_MODULE_MAX>;
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interrupts = <RTC_CORE_INTR_SOURCE>;
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interrupt-parent = <&intc>;
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status = "disabled";
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};
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flash: flash-controller@60002000 {
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compatible = "espressif,esp32-flash-controller";
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reg = <0x60002000 0x1000>;
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#address-cells = <1>;
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#size-cells = <1>;
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flash0: flash@0 {
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compatible = "soc-nv-flash";
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reg = <0 0x400000>;
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erase-block-size = <4096>;
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write-block-size = <4>;
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};
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};
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gpio0: gpio@60004000 {
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compatible = "espressif,esp32-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x60004000 0x800>;
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interrupts = <GPIO_INTR_SOURCE>;
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interrupt-parent = <&intc>;
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/* Maximum available pins (per port)
117+
* Actual occupied pins are specified
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* on part number dtsi level, using
119+
* the `gpio-reserved-ranges` property.
120+
*/
121+
ngpios = <20>; /* 0..20 */
122+
};
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i2c0: i2c@60013000 {
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compatible = "espressif,esp32-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x60013000 0x1000>;
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interrupts = <I2C_EXT0_INTR_SOURCE>;
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interrupt-parent = <&intc>;
131+
clocks = <&rtc ESP32_I2C0_MODULE>;
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status = "disabled";
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};
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uart0: uart@60000000 {
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compatible = "espressif,esp32-uart";
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reg = <0x60000000 0x400>;
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status = "disabled";
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interrupts = <UART0_INTR_SOURCE>;
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interrupt-parent = <&intc>;
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clocks = <&rtc ESP32_UART0_MODULE>;
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};
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uart1: uart@60010000 {
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compatible = "espressif,esp32-uart";
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reg = <0x60010000 0x400>;
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status = "disabled";
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interrupts = <UART1_INTR_SOURCE>;
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interrupt-parent = <&intc>;
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clocks = <&rtc ESP32_UART1_MODULE>;
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current-speed = <115200>;
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};
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ledc0: ledc@60019000 {
155+
compatible = "espressif,esp32-ledc";
156+
pwm-controller;
157+
#pwm-cells = <3>;
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reg = <0x60019000 0x1000>;
159+
clocks = <&rtc ESP32_LEDC_MODULE>;
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status = "disabled";
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};
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timer0: counter@6001f000 {
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compatible = "espressif,esp32-timer";
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reg = <0x6001F000 DT_SIZE_K(4)>;
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group = <0>;
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index = <0>;
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interrupts = <TG0_T0_LEVEL_INTR_SOURCE>;
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interrupt-parent = <&intc>;
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status = "disabled";
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};
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trng0: trng@3ff700b0 {
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compatible = "espressif,esp32-trng";
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reg = <0x3FF700B0 0x4>;
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status = "disabled";
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};
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spi2: spi@60024000 {
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compatible = "espressif,esp32-spi";
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reg = <0x60024000 DT_SIZE_K(4)>;
182+
interrupts = <SPI2_INTR_SOURCE>;
183+
interrupt-parent = <&intc>;
184+
clocks = <&rtc ESP32_SPI2_MODULE>;
185+
dma-clk = <ESP32_GDMA_MODULE>;
186+
dma-host = <0>;
187+
status = "disabled";
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};
189+
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wdt0: watchdog@6001f048 {
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compatible = "espressif,esp32-watchdog";
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reg = <0x6001f048 0x20>;
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interrupts = <TG0_WDT_LEVEL_INTR_SOURCE>;
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interrupt-parent = <&intc>;
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clocks = <&rtc ESP32_TIMG0_MODULE>;
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status = "disabled";
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};
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coretemp: coretemp@60040058 {
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compatible = "espressif,esp32-temp";
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friendly-name = "coretemp";
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reg = <0x60040058 0x4>;
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status = "disabled";
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};
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};
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};

‎dts/riscv/espressif/esp32c2/esp8684_mini_h2.dtsi

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/*
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* Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd.
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*/
6+
7+
#include "esp32c2_common.dtsi"
8+
9+
/* 2MB flash */
10+
&flash0 {
11+
reg = <0x0 DT_SIZE_M(2)>;
12+
};

‎dts/riscv/espressif/esp32c2/esp8684_mini_h4.dtsi

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/*
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* Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd.
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*/
6+
7+
#include "esp32c2_common.dtsi"
8+
9+
/* 4MB flash */
10+
&flash0 {
11+
reg = <0x0 DT_SIZE_M(4)>;
12+
};

‎dts/riscv/espressif/esp32c2/esp8684_wroom_h2.dtsi

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/*
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* Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd.
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*/
6+
7+
#include "esp32c2_common.dtsi"
8+
9+
/* 2MB flash */
10+
&flash0 {
11+
reg = <0x0 DT_SIZE_M(2)>;
12+
};

‎dts/riscv/espressif/esp32c2/esp8684_wroom_h4.dtsi

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/*
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* Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd.
3+
*
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* SPDX-License-Identifier: Apache-2.0
5+
*/
6+
7+
#include "esp32c2_common.dtsi"
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9+
/* 4MB flash */
10+
&flash0 {
11+
reg = <0x0 DT_SIZE_M(4)>;
12+
};

‎soc/espressif/common/Kconfig.defconfig

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@@ -1,7 +1,7 @@
1-
# Copyright (c) 2023 Espressif Systems (Shanghai) Co., Ltd.
1+
# Copyright (c) 2024 Espressif Systems (Shanghai) Co., Ltd.
22
# SPDX-License-Identifier: Apache-2.0
33

4-
if SOC_SERIES_ESP32C3 || SOC_SERIES_ESP32C6
4+
if SOC_SERIES_ESP32C2 || SOC_SERIES_ESP32C3 || SOC_SERIES_ESP32C6
55

66
config GEN_ISR_TABLES
77
default y
@@ -22,7 +22,8 @@ config ATOMIC_OPERATIONS_C
2222
default y
2323

2424
config SYS_CLOCK_HW_CYCLES_PER_SEC
25-
default 16000000
25+
default 12000000 if SOC_SERIES_ESP32C2
26+
default 16000000 if SOC_SERIES_ESP32C3 || SOC_SERIES_ESP32C6
2627

2728
config SYS_CLOCK_TICKS_PER_SEC
2829
default 1000
@@ -49,7 +50,7 @@ config ROM_START_OFFSET
4950

5051
endif # BOOTLOADER_MCUBOOT
5152

52-
endif # SOC_SERIES_ESP32C3
53+
endif # SOC_SERIES_ESP32C2 || SOC_SERIES_ESP32C3 || SOC_SERIES_ESP32C6
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5455
if SOC_SERIES_ESP32 || SOC_SERIES_ESP32S2 || SOC_SERIES_ESP32S3
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‎soc/espressif/common/Kconfig.esptool

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@@ -81,6 +81,7 @@ config ESPTOOLPY_FLASHMODE
8181
choice ESPTOOLPY_FLASHFREQ
8282
prompt "Flash SPI speed"
8383
default ESPTOOLPY_FLASHFREQ_40M if SOC_SERIES_ESP32
84+
default ESPTOOLPY_FLASHFREQ_60M if SOC_SERIES_ESP32C2
8485
default ESPTOOLPY_FLASHFREQ_80M if ESPTOOLPY_FLASHFREQ_80M_DEFAULT
8586

8687
config ESPTOOLPY_FLASHFREQ_120M
@@ -99,6 +100,8 @@ config ESPTOOLPY_FLASHFREQ_120M
99100

100101
config ESPTOOLPY_FLASHFREQ_80M
101102
bool "80 MHz"
103+
config ESPTOOLPY_FLASHFREQ_60M
104+
bool "60 MHz"
102105
config ESPTOOLPY_FLASHFREQ_40M
103106
bool "40 MHz"
104107
config ESPTOOLPY_FLASHFREQ_26M
@@ -121,6 +124,7 @@ config ESPTOOLPY_FLASHFREQ
121124
# We currently define this to `80m`.
122125
default '80m' if ESPTOOLPY_FLASHFREQ_120M
123126
default '80m' if ESPTOOLPY_FLASHFREQ_80M
127+
default '60m' if ESPTOOLPY_FLASHFREQ_60M
124128
default '40m' if ESPTOOLPY_FLASHFREQ_40M
125129
default '26m' if ESPTOOLPY_FLASHFREQ_26M
126130
default '20m' if ESPTOOLPY_FLASHFREQ_20M

‎soc/espressif/common/Kconfig.flash

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@@ -94,7 +94,7 @@ config BOOTLOADER_FLASH_XMC_SUPPORT
9494
choice BOOTLOADER_VDDSDIO_BOOST
9595
bool "VDDSDIO LDO voltage"
9696
default BOOTLOADER_VDDSDIO_BOOST_1_9V
97-
depends on !SOC_SERIES_ESP32C3 && !SOC_SERIES_ESP32C6
97+
depends on !SOC_SERIES_ESP32C2 && !SOC_SERIES_ESP32C3 && !SOC_SERIES_ESP32C6
9898
help
9999
If this option is enabled, and VDDSDIO LDO is set to 1.8V (using eFuse
100100
or MTDI bootstrapping pin), bootloader will change LDO settings to

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