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drivers: flash: spi_nor: Set 4-byte addr mode via write instruction 0x17
Some flash devices enable entering the 4-byte address mode by setting BIT(7) in a special register via a write instruction 0x17. The support for this method is indicated in BIT(3) of Enter 4-Byte Addressing byte in 16th DWORD of the JEDEC Basic Flash Parameter Table. Infineon's S25FL512S is an example flash device with this feature. Signed-off-by: Andriy Gelman <[email protected]>
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drivers/flash/spi_nor.c

Lines changed: 19 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1094,26 +1094,40 @@ static int spi_nor_set_address_mode(const struct device *dev,
10941094

10951095
/* This currently only supports command 0xB7 (Enter 4-Byte
10961096
* Address Mode), with or without preceding WREN.
1097+
* Or when BIT(3) is set where the 4-byte address mode can be entered
1098+
* by setting BIT(7) in a register via a 0x17 write
1099+
* instruction. See JEDEC 216F 16th DWORD.
10971100
*/
1098-
if ((enter_4byte_addr & 0x03) == 0) {
1101+
if ((enter_4byte_addr & 0x0b) == 0) {
10991102
return -ENOTSUP;
11001103
}
11011104

11021105
acquire_device(dev);
11031106

1107+
if ((enter_4byte_addr & 0x08) != 0) {
1108+
/* Enter 4-byte address mode by setting BIT(7) in a register
1109+
* via a 0x17 write instruction.
1110+
*/
1111+
uint8_t sr = BIT(7);
1112+
1113+
ret = spi_nor_access(dev, 0x17, NOR_ACCESS_WRITE, 0, &sr, sizeof(sr));
1114+
goto done;
1115+
}
1116+
11041117
if ((enter_4byte_addr & 0x02) != 0) {
11051118
/* Enter after WREN. */
11061119
ret = spi_nor_cmd_write(dev, SPI_NOR_CMD_WREN);
11071120
}
11081121

11091122
if (ret == 0) {
11101123
ret = spi_nor_cmd_write(dev, SPI_NOR_CMD_4BA);
1124+
}
11111125

1112-
if (ret == 0) {
1113-
struct spi_nor_data *data = dev->data;
1126+
done:
1127+
if (ret == 0) {
1128+
struct spi_nor_data *data = dev->data;
11141129

1115-
data->flag_access_32bit = true;
1116-
}
1130+
data->flag_access_32bit = true;
11171131
}
11181132

11191133
release_device(dev);

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