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1 | 1 | /*
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2 |
| - * Copyright 2017,2021,2023-2024 NXP |
| 2 | + * Copyright 2017,2021,2023-2025 NXP |
3 | 3 | * Copyright (c) 2020 Softube
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4 | 4 | *
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5 | 5 | * SPDX-License-Identifier: Apache-2.0
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@@ -30,6 +30,12 @@ LOG_MODULE_REGISTER(uart_mcux_lpuart, LOG_LEVEL_ERR);
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30 | 30 |
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31 | 31 | #define PINCTRL_STATE_FLOWCONTROL PINCTRL_STATE_PRIV_START
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32 | 32 |
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| 33 | +#if defined(CONFIG_UART_LINE_CTRL) && \ |
| 34 | + defined(FSL_FEATURE_LPUART_HAS_MODEM_SUPPORT) && \ |
| 35 | + (FSL_FEATURE_LPUART_HAS_MODEM_SUPPORT) |
| 36 | +#define UART_LINE_CTRL_ENABLE |
| 37 | +#endif |
| 38 | + |
33 | 39 | #if defined(CONFIG_UART_ASYNC_API) && defined(CONFIG_UART_INTERRUPT_DRIVEN)
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34 | 40 | /* there are already going to be build errors, but at least this message will
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35 | 41 | * be the first error from this driver making the reason clear
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@@ -1179,6 +1185,44 @@ static int mcux_lpuart_configure(const struct device *dev,
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1179 | 1185 | }
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1180 | 1186 | #endif /* CONFIG_UART_USE_RUNTIME_CONFIGURE */
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1181 | 1187 |
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| 1188 | +#ifdef UART_LINE_CTRL_ENABLE |
| 1189 | +static void mcux_lpuart_line_ctrl_set_rts(const struct mcux_lpuart_config *config, |
| 1190 | + uint32_t val) |
| 1191 | +{ |
| 1192 | + if (val >= 1U) { |
| 1193 | + /* Reset TXRTS to set RXRTSE bit, this provides high-level on RTS line */ |
| 1194 | + config->base->MODIR &= ~(LPUART_MODIR_TXRTSPOL_MASK | LPUART_MODIR_TXRTSE_MASK); |
| 1195 | + config->base->MODIR |= LPUART_MODIR_RXRTSE_MASK; |
| 1196 | + } else { |
| 1197 | + /* Set TXRTSE to reset RXRTSE bit,this provide low-level on RTS line*/ |
| 1198 | + config->base->MODIR &= ~(LPUART_MODIR_RXRTSE_MASK); |
| 1199 | + config->base->MODIR |= (LPUART_MODIR_TXRTSPOL_MASK | LPUART_MODIR_TXRTSE_MASK); |
| 1200 | + } |
| 1201 | +} |
| 1202 | + |
| 1203 | +static int mcux_lpuart_line_ctrl_set(const struct device *dev, |
| 1204 | + uint32_t ctrl, uint32_t val) |
| 1205 | +{ |
| 1206 | + const struct mcux_lpuart_config *config = dev->config; |
| 1207 | + int ret = 0; |
| 1208 | + |
| 1209 | + switch (ctrl) { |
| 1210 | + case UART_LINE_CTRL_RTS: |
| 1211 | + /* Disable Transmitter and Receiver */ |
| 1212 | + config->base->CTRL &= ~(LPUART_CTRL_TE_MASK | LPUART_CTRL_RE_MASK); |
| 1213 | + |
| 1214 | + mcux_lpuart_line_ctrl_set_rts(config, val); |
| 1215 | + |
| 1216 | + break; |
| 1217 | + |
| 1218 | + default: |
| 1219 | + ret = -ENOTSUP; |
| 1220 | + } |
| 1221 | + |
| 1222 | + return ret; |
| 1223 | +} |
| 1224 | +#endif /* UART_LINE_CTRL_ENABLE */ |
| 1225 | + |
1182 | 1226 | static int mcux_lpuart_init(const struct device *dev)
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1183 | 1227 | {
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1184 | 1228 | const struct mcux_lpuart_config *config = dev->config;
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@@ -1257,6 +1301,9 @@ static DEVICE_API(uart, mcux_lpuart_driver_api) = {
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1257 | 1301 | .rx_buf_rsp = mcux_lpuart_rx_buf_rsp,
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1258 | 1302 | .rx_disable = mcux_lpuart_rx_disable,
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1259 | 1303 | #endif /* CONFIG_UART_ASYNC_API */
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| 1304 | +#ifdef UART_LINE_CTRL_ENABLE |
| 1305 | + .line_ctrl_set = mcux_lpuart_line_ctrl_set, |
| 1306 | +#endif /* UART_LINE_CTRL_ENABLE */ |
1260 | 1307 | };
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1261 | 1308 |
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1262 | 1309 |
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