board: pinctrl: board configs in rt1xxx

enable pin control in board level

Signed-off-by: Hake Huang <[email protected]>
Signed-off-by: Daniel DeGrasse <[email protected]>

Author: hakehuang

boards/arm/mimxrt1060_evk/mimxrt1060_evk-pinctrl.dtsi

@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2022, NXP
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Generated by rt_cfg_utils.py on 2022-01-19
+ */
+
+#include <nxp/nxp_imx/rt/mimxrt1062-pinctrl.dtsi>
+
+&IOMUXC_GPIO_AD_B0_12_LPUART1_TX {
+	bias-bus-hold;
+	input-enable;
+};
+
+&IOMUXC_GPIO_AD_B0_13_LPUART1_RX {
+	bias-bus-hold;
+};
+
+&IOMUXC_GPIO_AD_B1_09_SAI1_MCLK {
+	bias-bus-hold;
+	input-enable;
+};
+
+&IOMUXC_GPIO_AD_B1_12_SAI1_RX_DATA00 {
+	bias-bus-hold;
+	input-enable;
+};
+
+&IOMUXC_GPIO_AD_B1_13_SAI1_TX_DATA00 {
+	bias-bus-hold;
+	input-enable;
+};
+
+&IOMUXC_GPIO_AD_B1_14_SAI1_TX_BCLK {
+	bias-bus-hold;
+	input-enable;
+};
+
+&IOMUXC_GPIO_AD_B1_15_SAI1_TX_SYNC {
+	bias-bus-hold;
+	input-enable;
+};
+

boards/arm/mimxrt1060_evk/mimxrt1060_evk.dts

@@ -7,6 +7,7 @@
 /dts-v1/;
 
 #include <nxp/nxp_rt1060.dtsi>
+#include "mimxrt1060_evk-pinctrl.dtsi"
 
 / {
 	model = "NXP MIMXRT1060-EVK board";
@@ -164,6 +165,8 @@ arduino_serial: &lpuart3 {};
 &lpuart1 {
 	status = "okay";
 	current-speed = <115200>;
+	pinctrl-0 = <&IOMUXC_GPIO_AD_B0_12_LPUART1_TX &IOMUXC_GPIO_AD_B0_13_LPUART1_RX>;
+	pinctrl-names = "default";
 };
 
 &enet {
@@ -218,6 +221,12 @@ zephyr_udc0: &usb1 {
 
 &sai1 {
 	status = "okay";
+	pinctrl-0 = <&IOMUXC_GPIO_B0_13_SAI1_MCLK
+					&IOMUXC_GPIO_AD_B1_12_SAI1_RX_DATA00
+					&IOMUXC_GPIO_AD_B1_13_SAI1_TX_DATA00
+					&IOMUXC_GPIO_AD_B1_14_SAI1_TX_BCLK
+					&IOMUXC_GPIO_AD_B1_15_SAI1_TX_SYNC>;
+	pinctrl-names = "default";
 };
 
 /* Enable GPT for use as a hardware timer. This disables Cortex Systick.
@@ -226,3 +235,11 @@ zephyr_udc0: &usb1 {
 &gpt_hw_timer {
 	status = "okay";
 };
+
+&iomuxcgpr {
+	status = "okay";
+};
+
+&pinctrl {
+	status = "okay";
+};

boards/arm/mimxrt1060_evk/pinmux.c

@@ -114,22 +114,6 @@ static int mimxrt1060_evk_init(const struct device *dev)
 	IOMUXC_SetPinMux(IOMUXC_SNVS_WAKEUP_GPIO5_IO00, 0);
 #endif
 
-#if DT_NODE_HAS_STATUS(DT_NODELABEL(lpuart1), okay) && CONFIG_SERIAL
-	/* LPUART1 TX/RX */
-	IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0);
-	IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0);
-
-	IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_12_LPUART1_TX,
-			    IOMUXC_SW_PAD_CTL_PAD_PKE_MASK |
-			    IOMUXC_SW_PAD_CTL_PAD_SPEED(2) |
-			    IOMUXC_SW_PAD_CTL_PAD_DSE(6));
-
-	IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_13_LPUART1_RX,
-			    IOMUXC_SW_PAD_CTL_PAD_PKE_MASK |
-			    IOMUXC_SW_PAD_CTL_PAD_SPEED(2) |
-			    IOMUXC_SW_PAD_CTL_PAD_DSE(6));
-#endif
-
 #if DT_NODE_HAS_STATUS(DT_NODELABEL(lpuart3), okay) && CONFIG_SERIAL
 	/* LPUART3 TX/RX */
 	IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_06_LPUART3_TX, 0);
@@ -388,20 +372,6 @@ static int mimxrt1060_evk_init(const struct device *dev)
 			    IOMUXC_SW_PAD_CTL_PAD_DSE(6));
 #endif
 
-#if DT_NODE_HAS_STATUS(DT_NODELABEL(sai1), okay) && CONFIG_I2S
-	IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_09_SAI1_MCLK, 1U);
-	IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_12_SAI1_RX_DATA00, 1U);
-	IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_13_SAI1_TX_DATA00, 1U);
-	IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_14_SAI1_TX_BCLK, 1U);
-	IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_15_SAI1_TX_SYNC, 1U);
-
-	IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_09_SAI1_MCLK, 0x10B0u);
-	IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_12_SAI1_RX_DATA00, 0x10B0u);
-	IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_13_SAI1_TX_DATA00, 0x10B0u);
-	IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_14_SAI1_TX_BCLK, 0x10B0u);
-	IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B1_15_SAI1_TX_SYNC, 0x10B0u);
-#endif
-
 	return 0;
 }