boards: arm: mps2-an521: Fix DT memory regions

Currently RAM region specified in the DT for board mps2-an512 to store
data (not to run code) is set to start at 0x3000_0000 and a 16M
contiguous space is assumed. However, at that address there is no such
contiguous space of 16M, rather only a 128K area is available. As a
consequence large applications linked with Zephyr might end up using
memory regions that are not valid, specially at runtime when the stack
grows, causing a BusFault.

Application Note 512 only specifies a 16M contiguous space available
starting at 0x8000_0000 (please see 'Table 3-4: SSRAM2 and SSRAM3
address mapping' and 'Table 3-6: External PSRAM mapping to Code Memory',
on pages 3-7 and 3-8, respectively), which resides in the PSRAM
(external RAM).

The AN521 also specifies a 4M contiguous space available starting at
0x3800_0000 which can be used as RAM for data storage and which is not
currently described in the DT.

The current DT also defines a 224M flash region (to run code) which
doesn't effectively exist, because most of it is reserved (~148M).

That commit fixes the incorrect definition of region 0x3000_0000 (16M)
and hence defines a new region called 'sram2_3' that maps to region
0x3800_0000 (4M) which is used as RAM to store data, and fixes the flash
region defining a new region 'sram1' (4M) from where code is executed
(starting at 0x1000_0000). The board has no real flash memory, rather an
auxilary HW populates the appropriate memory regions from images found
in a MicroSD card.

That commit also defines the missing PSRAM (16M) region ('psram') which
can be used by large programs as a general purpose RAM.

Finally, it also fixes the DT for the non-secure memory regions to
reflect the fixes described above for the secure memory regions.

Signed-off-by: Gustavo Romero <[email protected]>

Author: gromero

boards/arm/mps2_an521/mps2_an521.dts

@@ -6,6 +6,7 @@
 
 /dts-v1/;
 
+#include <mem.h>
 #include <arm/armv8-m.dtsi>
 #include <dt-bindings/i2c/i2c.h>
 
@@ -25,8 +26,8 @@
 	chosen {
 		zephyr,console = &uart0;
 		zephyr,shell-uart = &uart0;
-		zephyr,sram = &sram0;
-		zephyr,flash = &flash0;
+		zephyr,sram = &sram2_3;
+		zephyr,flash = &sram1;
 	};
 
 	leds {
@@ -72,13 +73,25 @@
 		};
 	};
 
-	sram0: memory@30000000 {
+	/*
+	 * The memory regions defined below are according to AN521:
+	 * https://documentation-service.arm.com/static/5fa12fe9b1a7c5445f29017f
+	 * Please see tables from 3-1 to 3-4.
+	 */
+
+	sram1: memory@10000000 {
+		compatible = "mmio-sram";
+		reg = <0x10000000 DT_SIZE_M(4)>;
+	};
+
+	sram2_3: memory@38000000 {
 		compatible = "mmio-sram";
-		reg = <0x30000000 0x1000000>;
+		reg = <0x38000000 DT_SIZE_M(4)>;
 	};
 
-	flash0: flash@10000000 {
-		reg = <0x10000000 0xE000000>;
+	psram: memory@80000000 {
+		device_type = "memory";
+		reg = <0x80000000 DT_SIZE_M(16)>;
 	};
 
 	soc {

boards/arm/mps2_an521/mps2_an521_nonsecure.dts

@@ -6,6 +6,7 @@
 
 /dts-v1/;
 
+#include <mem.h>
 #include <arm/armv8-m.dtsi>
 #include <dt-bindings/i2c/i2c.h>
 
@@ -25,8 +26,8 @@
 	chosen {
 		zephyr,console = &uart0;
 		zephyr,shell-uart = &uart0;
-		zephyr,sram = &sram0;
-		zephyr,flash = &flash0;
+		zephyr,sram = &ram;
+		zephyr,flash = &code;
 	};
 
 	leds {
@@ -72,13 +73,45 @@
 		};
 	};
 
-	sram0: memory@28100000 {
+	/*
+	 * The memory regions defined below are according to AN521:
+	 * https://documentation-service.arm.com/static/5fa12fe9b1a7c5445f29017f
+	 * Please see tables from 3-1 to 3-4.
+	 */
+
+	sram1: memory@0 {
+		compatible = "mmio-sram";
+		reg = <0x0 DT_SIZE_M(4)>;
+	};
+
+	sram2_3: memory@28000000 {
 		compatible = "mmio-sram";
-		reg = <0x28100000 0x100000>;
+		reg = <0x28000000 DT_SIZE_M(4)>;
+	};
+
+	psram: memory@80000000 {
+		device_type = "memory";
+		reg = <0x80000000 DT_SIZE_M(16)>;
 	};
 
-	flash0: flash@100000 {
-		reg = <0x100000 0xDF00000>;
+	reserved-memory {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+
+		/* The memory regions defined below must match what the TF-M
+		 * project has defined for that board - a single image boot is
+		 * assumed. Please see the memory layout in:
+		 * https://git.trustedfirmware.org/TF-M/trusted-firmware-m.git/tree/platform/ext/target/mps2/an521/partition/flash_layout.h
+		 */
+
+		code: memory@100000 {
+			reg = <0x00100000 DT_SIZE_K(512)>;
+		};
+
+		ram: memory@28100000 {
+			reg = <0x28100000 DT_SIZE_M(1)>;
+		};
 	};
 
 	soc {