drivers: counter: stm32: enable support for H7 series

Enable counter driver support for H7 series. Tested with H743ZI MCU
using samples/drivers/counter/alarm.

Signed-off-by: Gerard Marull-Paretas <[email protected]>

Author: gmarull

drivers/counter/Kconfig.stm32_rtc

@@ -12,7 +12,7 @@ menuconfig COUNTER_RTC_STM32
 	select USE_STM32_LL_EXTI
 	select REQUIRES_FULL_LIBC
 	help
-	  Build RTC driver for STM32 SoCs. Tested on STM32 F3, F4, L4, F7, G4 series
+	  Build RTC driver for STM32 SoCs. Tested on STM32 F3, F4, L4, F7, G4, H7 series
 
 choice COUNTER_RTC_STM32_CLOCK_SRC
 	bool "RTC clock source"

drivers/counter/counter_ll_stm32_rtc.c

@@ -31,7 +31,8 @@ LOG_MODULE_REGISTER(counter_rtc_stm32, CONFIG_COUNTER_LOG_LEVEL);
 	|| defined(CONFIG_SOC_SERIES_STM32F7X) \
 	|| defined(CONFIG_SOC_SERIES_STM32WBX) \
 	|| defined(CONFIG_SOC_SERIES_STM32G4X) \
-	|| defined(CONFIG_SOC_SERIES_STM32L1X)
+	|| defined(CONFIG_SOC_SERIES_STM32L1X) \
+	|| defined(CONFIG_SOC_SERIES_STM32H7X)
 #define RTC_EXTI_LINE	LL_EXTI_LINE_17
 #endif
 

dts/arm/st/h7/stm32h7.dtsi

@@ -226,6 +226,16 @@
 			status = "disabled";
 			label = "UART_8";
 		};
+
+		rtc: rtc@58004000 {
+			compatible = "st,stm32-rtc";
+			reg = <0x58004000 0x400>;
+			interrupts = <41 0>;
+			clocks = <&rcc STM32_CLOCK_BUS_APB4 0x00010000>;
+			prescaler = <32768>;
+			status = "disabled";
+			label = "RTC_0";
+		};
 	};
 };
 

soc/arm/st_stm32/stm32h7/dts_fixup.h

@@ -181,6 +181,13 @@
 #define DT_UART_STM32_UART_8_CLOCK_BUS		DT_ST_STM32_UART_40007C00_CLOCK_BUS
 #define DT_UART_STM32_UART_8_HW_FLOW_CONTROL	DT_ST_STM32_UART_40007C00_HW_FLOW_CONTROL
 
+#define DT_RTC_0_BASE_ADDRESS	DT_ST_STM32_RTC_58004000_BASE_ADDRESS
+#define DT_RTC_0_IRQ_PRI	DT_ST_STM32_RTC_58004000_IRQ_0_PRIORITY
+#define DT_RTC_0_IRQ		DT_ST_STM32_RTC_58004000_IRQ_0
+#define DT_RTC_0_NAME		DT_ST_STM32_RTC_58004000_LABEL
+#define DT_RTC_0_CLOCK_BITS	DT_ST_STM32_RTC_58004000_CLOCK_BITS
+#define DT_RTC_0_CLOCK_BUS	DT_ST_STM32_RTC_58004000_CLOCK_BUS
+
 #define DT_WWDT_0_BASE_ADDRESS		DT_INST_0_ST_STM32_WINDOW_WATCHDOG_BASE_ADDRESS
 #define DT_WWDT_0_NAME			DT_INST_0_ST_STM32_WINDOW_WATCHDOG_LABEL
 #define DT_WWDT_0_IRQ			DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0

soc/arm/st_stm32/stm32h7/soc.h

@@ -64,6 +64,12 @@
 #include <stm32h7xx_ll_utils.h>
 #endif
 
+#ifdef CONFIG_COUNTER_RTC_STM32
+#include <stm32h7xx_ll_rtc.h>
+#include <stm32h7xx_ll_exti.h>
+#include <stm32h7xx_ll_pwr.h>
+#endif /* CONFIG_COUNTER_RTC_STM32 */
+
 #endif /* !_ASMLANGUAGE */
 
 #endif /* _STM32F7_SOC_H7_ */