Making SDHC work for the use of a filesystem on the NXP MIMXRT1020 EVK

[awfulwaffle77]

I am trying to use Zephyr on an NXP MXRT1020.

My problem is pretty simple. I would like to add a C/C++ program to the NXP MIMXRT1020 EVK that classifies some traffic signs. The issue here is that for a neural network to work, I need some files containg the model and some other stuff. The need of files raises the issue of needing a filesystem which Zephyr does not support on the MIMXRT1020 EVK. So I've tought of writing my own SDHC "driver" to help me with this issue and maybe also help the community for that matter. I've tought of embedding the model in the program, but many of the functions of the library I tried to use (opencv cnn classifier and Shark) use functions that require opening files, so it was either modifying those or Zephyr.

I've posted a week ago this post which asked about how to basically write (some kind of) a driver for the NXP MIMXRT1020 EVK so that I can use the SDHC to compile the fat filesystem sample. I am really new to this so I would love if you could help me out a bit as some of you did already.

What I've tried

Following the hints from the Reddit post, I've tried copying the sdhc from the 1060 dts. I've read the 1060 reference manual and understood that the 1060 cd-gpios references to a pad that has a USDHC1_CD_B, so the 1020 cd-gpios should correspond to GPIO1_IO26, that corresponds to the pad GPIO_AD_B1_10 (I've seen that there are multiple pads that allow USDHC1_CD_B, but this was the first one I found). I did not understand how the GPIO1_IO05 on the 1060 corresponds to pwr-gpios so I have not modified it yet. Maybe you could help me with this. I've written in the 1020 dts the following lines:

&usdhc1 {
	status = "okay";
	pwr-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
	cd-gpios = <&gpio1 26 GPIO_ACTIVE_LOW>;
	status = "okay";
}

I tought that was all, but the west build -b mimxrt1020_evk /samples/subsys/fs/fat_fs resulted in some linking error where I also need help with. After some fiddling with the repo I understood that the task was not that simple and that I had to modify other files, so I went to 1020 pinmux.c and tried to add the imxrt1060_evk_usdhc_pinmux function from the 1060 pinmux.c, modified a bit, as such:

static void mimxrt1020_evk_usdhc_pinmux(uint16_t nusdhc, bool init, uint32_t speed,
					uint32_t strength)
{
	uint32_t cmd_data = IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) |
			 IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |
			 IOMUXC_SW_PAD_CTL_PAD_PKE_MASK |
			 IOMUXC_SW_PAD_CTL_PAD_PUE_MASK |
			 IOMUXC_SW_PAD_CTL_PAD_HYS_MASK |
			 IOMUXC_SW_PAD_CTL_PAD_PUS(1) |
			 IOMUXC_SW_PAD_CTL_PAD_DSE(strength);

	uint32_t clk = IOMUXC_SW_PAD_CTL_PAD_SPEED(speed) |
		    IOMUXC_SW_PAD_CTL_PAD_SRE_MASK |
		    IOMUXC_SW_PAD_CTL_PAD_HYS_MASK |
		    IOMUXC_SW_PAD_CTL_PAD_PUS(0) |
		    IOMUXC_SW_PAD_CTL_PAD_DSE(strength);

	if (nusdhc != 0) {
		LOG_ERR("Invalid USDHC index");
		return;
	}

	if (init) {
		IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_05_GPIO1_IO05, 0U);

		/* SD_CD */
		IOMUXC_SetPinMux(IOMUXC_GPIO_B1_12_GPIO2_IO28, 0U); // not modified
		//IOMUXC_SetPinMux(IOMUXC_GPIO_B1_14_USDHC1_VSELECT, 0U); // modified
		IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B1_07_USDHC1_VSELECT, 0U);
		IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_02_USDHC1_CMD, 0U);
		//IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_00_USDHC1_CMD, 0U); // modified
		//IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_01_USDHC1_CLK, 0U); // modified
		IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_03_USDHC1_CLK, 0U);
		//IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_02_USDHC1_DATA0, 0U); // modified
		IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_04_USDHC1_DATA0, 0U);
		//IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_03_USDHC1_DATA1, 0U); // modified
		IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_05_USDHC1_DATA1, 0U);
		//IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_04_USDHC1_DATA2, 0U); // modified
		IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_00_USDHC1_DATA2, 0U);
		//IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_05_USDHC1_DATA3, 0U); // modified
		IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_01_USDHC1_DATA3, 0U);

		IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_05_GPIO1_IO05, 0x10B0u);

		/* SD0_CD_SW */
		IOMUXC_SetPinConfig(IOMUXC_GPIO_B1_12_GPIO2_IO28, 0x017089u);

		/* SD0_VSELECT */
		IOMUXC_SetPinConfig(IOMUXC_GPIO_B1_14_USDHC1_VSELECT,
				    0x0170A1u);
	}

	IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_00_USDHC1_CMD, cmd_data);
	IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_01_USDHC1_CLK, clk);
	IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_02_USDHC1_DATA0, cmd_data);
	IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_03_USDHC1_DATA1, cmd_data);
	IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_04_USDHC1_DATA2, cmd_data);
	IOMUXC_SetPinConfig(IOMUXC_GPIO_SD_B0_05_USDHC1_DATA3, cmd_data);
}
#endif

I am not sure what the adresses(I suppose) in the IOMUXC_SetPinConfig are supposed to point to, as I've not found any of them in the 1060 reference manual. The GPIO2_IO28 from the IOMUXC_SetPinConfig(IOMUXC_GPIO_B1_12_GPIO2_IO28, 0x017089u) points to another USDHC1_CD_B as shown in this image from the reference manual of the 1060. It it really confusing.

Also, this resulted in the same linking error.

I have also tried building the application for the MIMXRT1024 and flash it to my 1020, but there is an error when running with error code -5 that says the Error mounting disk.

What I would love to get some help with

I would love if someone could help me find the documentation for this kind of stuff(I don't even know how to name it), understand what files I need to modify, help me with the linking error or any other hint. Do you recommend me posting this to somewhere else?

If you think of any other solution for solving my problem, I would also love to know!

Thank you!

[MaureenHelm]

Please have a look at #35303

[dleach02]

@awfulwaffle77, did the PR Maureen referenced help you?

[awfulwaffle77]

Sadly, no. Maybe I did not have the technical skills needed when I went through it. I have abandoned the task after multiple tries.

[ndrs-pst]

@awfulwaffle77, as of recent developments, it appears that the MIMXRT1020 EVK now supports usdhc.
After compiling the samples\subsys\fs\fs_sample for the mimxrt1020_evk boards, it shows that cd-gpios is assigned to GPIO3_IO19, and pwr-gpios is linked to GPIO3_IO24 instead.

usdhc1: usdhc@402c0000 {
    compatible = "nxp,imx-usdhc";
    reg = < 0x402c0000 0x4000 >;
    status = "okay";
    interrupts = < 0x6e 0x0 >;
    clocks = < &ccm 0x600 0x0 0x0 >;
    max-current-330 = < 0x3fc >;
    max-current-180 = < 0x3fc >;
    max-bus-freq = < 0xc65d400 >;
    min-bus-freq = < 0x61a80 >;
    no-1-8-v;
    pinctrl-0 = < &pinmux_usdhc1 >;
    pinctrl-1 = < &pinmux_usdhc1_slow >;
    pinctrl-2 = < &pinmux_usdhc1_med >;
    pinctrl-3 = < &pinmux_usdhc1_fast >;
    pinctrl-names = "default", "slow", "med", "fast";
    cd-gpios = < &gpio3 0x13 0x1 >;
    pwr-gpios = < &gpio3 0x18 0x0 >;
    sdmmc {
        compatible = "zephyr,sdmmc-disk";
        status = "okay";
    };
};

[DerekSnell]

As pointed out, SDHC support was added for the MIMXRT1020-EVK with merged PR #35303.