Add display driver support for st7735s #61714

weiyshay · 2023-08-21T17:06:42Z

weiyshay
Aug 21, 2023

Describe the solution you'd like
I am trying to test st7735s display on esp32c3 board and it seems on st7735r driver is integrated.

Describe alternatives you've considered
Use st7735r driver in a smaller resolution.

Hi,
I am trying to enable ST7735s display on ESP32c3 and about a week experience on the board & zephry.
I have successfully run some sample via serial console(blinky, thread, wifi).

I have connected five pins(gnd, vdd, cs, clk, sda) between the boards and the display, and it seems that I need to select a GPIO for 'DC' at least.

Appreciate if anyone can tell what I need to bring it up. Ideas that I got but don't know how to include:

1. Include st7735r driver in my build? How to?
2. Select a PIN for 'DC' Pin, 'GPIO11' here.
3. Mangle the pin configuration like below:
--- a/boards/riscv/esp32c3_devkitm/esp32c3_devkitm-pinctrl.dtsi
+++ b/boards/riscv/esp32c3_devkitm/esp32c3_devkitm-pinctrl.dtsi
@@ -23,12 +23,13 @@
 
     spim2_default: spim2_default {
         group1 {
-            pinmux = <SPIM2_MISO_GPIO2>,
-                 <SPIM2_SCLK_GPIO6>,
-                 <SPIM2_CSEL_GPIO10>;
+            pinmux = <SPIM2_MISO_GPIO3>,
+                 <SPIM2_SCLK_GPIO2>,
+                 <SPIM2_CSEL_GPIO7>;
+                 <SPIM2_DC_GPIO11>;
         };
         group2 {
-            pinmux = <SPIM2_MOSI_GPIO7>;
+            pinmux = <SPIM2_MOSI_GPIO3>;
             output-low;
         };
     };

4. Test. How to?
5. What else?

PIn layout:

Discord discussion:
https://discord.com/channels/720317445772017664/720317445772017667

weiyshay · 2023-08-21T17:23:55Z

weiyshay
Aug 21, 2023
Author

I tried to compile it with the 'lvgl' sample and got the following error, what I am missing?
It seems that esp32c3 has not been add added to the board list?

west build -p always -b esp32c3_devkitm  samples/subsys/display/lvgl/

in file included from /data/2023/src/esp32c3/zephyr-westbuild/zephyr/include/zephyr/toolchain/gcc.h:92,
                 from /data/2023/src/esp32c3/zephyr-westbuild/zephyr/include/zephyr/toolchain.h:50,
                 from /data/2023/src/esp32c3/zephyr-westbuild/zephyr/include/zephyr/sys/time_units.h:10,
                 from /data/2023/src/esp32c3/zephyr-westbuild/zephyr/include/zephyr/sys/util.h:615,
                 from /data/2023/src/esp32c3/zephyr-westbuild/zephyr/include/zephyr/devicetree.h:25,
                 from /data/2023/src/esp32c3/zephyr-westbuild/zephyr/include/zephyr/device.h:12,
                 from /data/2023/src/esp32c3/zephyr-westbuild/zephyr/samples/subsys/display/lvgl/src/main.c:7:
/data/2023/src/esp32c3/zephyr-westbuild/zephyr/samples/subsys/display/lvgl/src/main.c: In function 'main':
/data/2023/src/esp32c3/zephyr-westbuild/zephyr/include/zephyr/device.h:85:41: error: '__device_dts_ord_DT_CHOSEN_zephyr_display_ORD' undeclared (first use in this function)
   85 | #define DEVICE_NAME_GET(dev_id) _CONCAT(__device_, dev_id)

0 replies

faxe1008 · 2023-08-22T12:57:03Z

faxe1008
Aug 22, 2023
Collaborator

The build error suggests that your board overlay is missing the chosen zephyr,display node. The default device tree file for ESP32C3 does not come with one: esp32c3_devkitm.dts
So far you only changed the spi pinmux.

There is a shield available:
st7735r_ada_160x128.overlay. Maybe this helps you.

Zephyr shield doc: Doc

0 replies

weiyshay · 2023-08-22T16:49:44Z

weiyshay
Aug 22, 2023
Author

Faxe1008,
Thank you very much for your guidance, it is very helpful and I read through some docs and a tutor video on youtube:

https://www.youtube.com/watch?v=ddZ-04IVrak

I am very new to zephry and I haven't got the point on how to set it up. Appreciate if anyone can tell how to debug or fix it.
What I did:

1. Include the overlay with the recommended board 'nrf52840dk_nrf52840', good.
       west build -p always -b nrf52840dk_nrf52840 samples/subsys/display/lvgl -- -DSHIELD="st7735r_ada_160x128" 

2. Replace the board with esp32c3, failed with the error messages:
        west build -p always -b esp32c3_devkitm samples/subsys/display/lvgl -- **-DSHIELD="st7735r_ada_160x128"**
        -- In: /data/2023/src/esp32c3/zephyr-westbuild/z/build/zephyr, command: /root/zephyrproject/.venv/bin/python3.10;/data/2023
        /src/esp32c3/zephyr-westbuild/zephyr/scripts/dts/gen_defines.py;--dts;/data/2023/src/esp32c3/zephyr-westbuild/z/build/zephyr
        /zephyr.dts.pre;--dtc-flags;'';--bindings-dirs;/data/2023/src/esp32c3/zephyr-westbuild/zephyr/dts/bindings;--header-out;/data/2023/src
        /esp32c3/zephyr-westbuild/z/build/zephyr/include/generated/devicetree_generated.h.new;--dts-out;/data/2023/src/esp32c3/zephyr-
        westbuild/z/build/zephyr/zephyr.dts.new;--edt-pickle-out;/data/2023/src/esp32c3/zephyr-westbuild/z/build/zephyr/edt.pickle;--vendor-
        prefixes;/data/2023/src/esp32c3/zephyr-westbuild/zephyr/dts/bindings/vendor-prefixes.txt\
        CMake Error at /data/2023/src/esp32c3/zephyr-westbuild/zephyr/cmake/modules/dts.cmake:276 (message):
        gen_defines.py failed with return code: 1
        Call Stack (most recent call first):
        /data/2023/src/esp32c3/zephyr-westbuild/zephyr/cmake/modules/zephyr_default.cmake:129 (include)
        /data/2023/src/esp32c3/zephyr-westbuild/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:66 (include)
        /data/2023/src/esp32c3/zephyr-westbuild/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:92 (include_boilerplate)
        CMakeLists.txt:5 (find_package)
        -- Configuring incomplete, errors occurred!
        FATAL ERROR: command exited with status 1: /usr/local/bin/cmake -DWEST_PYTHON=/root/zephyrproject/.venv/bin/python3 -B/data                   
         /2023/src/esp32c3/zephyr-westbuild/z/build -GNinja -DBOARD=esp32c3_devkitm -DSHIELD=st7735r_ada_160x128 
         -DEXTRA_CFLAGS=-save-temps=obj -S/data/2023/src/esp32c3/zephyr-westbuild/z/samples/subsys/display/lvgl

3.  Compiled the dts/dtsi files in the two boards, and applied them afaik like below but still failed.
          --- a/boards/riscv/esp32c3_devkitm/esp32c3_devkitm.dts
          +++ b/boards/riscv/esp32c3_devkitm/esp32c3_devkitm.dts
          @@ -37,6 +37,19 @@
 	          };
           };
           
          +&spi2: spi@4002f000 {
          +	compatible = "nordic,nrf-spim";
          +	#address-cells = <1>;
          +	#size-cells = <0>;
          +	reg = <0x4002f000 0x1000>;
          +	interrupts = <47 NRF_DEFAULT_IRQ_PRIORITY>;
          +	max-frequency = <DT_FREQ_M(32)>;
          +	easydma-maxcnt-bits = <16>;
          +	rx-delay-supported;
          +	rx-delay = <2>;
          +	status = "disabled";
          +};
          +

0 replies

faxe1008 · 2023-08-23T13:24:21Z

faxe1008
Aug 23, 2023
Collaborator

The project builds just fine for me:

west build -p always -b nrf52840dk_nrf52840 samples/subsys/display/lvgl -- -DSHIELD="st7735r_ada_160x128"

Does the simple hello_world project build for you? Did you perform a west update beforehand to make sure the hal module is present?

0 replies

weiyshay · 2023-08-23T14:22:14Z

weiyshay
Aug 23, 2023
Author

Yes, it works with 'nrf52840dk_nrf52840', but I got the error when replacing the board to esp32 as:

 west build -p always -b esp32c3_devkitm samples/subsys/display/lvgl -- -DSHIELD="st7735r_ada_160x128"

I have successfully run hello_world, blinky, net/wifi examples without giving the 'SHIELD' on esp32c3.

0 replies

weiyshay · 2023-08-23T14:57:45Z

weiyshay
Aug 23, 2023
Author

I am guessing that I am missing the dts(i) related part and got an informational prompt after tried a bit:

Diff:

diff --git a/boards/riscv/esp32c3_devkitm/esp32c3_devkitm.dts b/boards/riscv/esp32c3_devkitm/esp32c3_devkitm.dts
index 60cfdea523..8ca28da4d9 100644
--- a/boards/riscv/esp32c3_devkitm/esp32c3_devkitm.dts
+++ b/boards/riscv/esp32c3_devkitm/esp32c3_devkitm.dts
@@ -37,6 +37,19 @@
 	};
 };
 
+&spi2: spi@4002f000 {
+	compatible = "nordic,nrf-spim";
+	#address-cells = <1>;
+	#size-cells = <0>;
+	reg = <0x4002f000 0x1000>;
+	interrupts = <47 NRF_DEFAULT_IRQ_PRIORITY>;
+	max-frequency = <DT_FREQ_M(32)>;
+	easydma-maxcnt-bits = <16>;
+	rx-delay-supported;
+	rx-delay = <2>;
+	status = "disabled";
+};
+
 &cpu0 {
 	clock-frequency = <ESP32_CLK_CPU_160M>;
 };
diff --git a/boards/riscv/esp32c3_devkitm/esp32c3_devkitm.yaml b/boards/riscv/esp32c3_devkitm/esp32c3_devkitm.yaml
index 552255dee0..8ceee441b7 100644
--- a/boards/riscv/esp32c3_devkitm/esp32c3_devkitm.yaml
+++ b/boards/riscv/esp32c3_devkitm/esp32c3_devkitm.yaml
@@ -6,6 +6,10 @@ toolchain:
   - zephyr
 supported:
   - adc
+  - arduino_gpio
+  - arduino_i2c
+  - arduino_serial
+  - arduino_spi
   - gpio
   - i2c
   - watchdog
diff --git a/boards/riscv/esp32c3_devkitm/esp32c3_devkitm_defconfig b/boards/riscv/esp32c3_devkitm/esp32c3_devkitm_defconfig
index 1ca521d9d9..948e98a1d6 100644
--- a/boards/riscv/esp32c3_devkitm/esp32c3_devkitm_defconfig
+++ b/boards/riscv/esp32c3_devkitm/esp32c3_devkitm_defconfig
@@ -9,3 +9,6 @@ CONFIG_CONSOLE=y
 CONFIG_SERIAL=y
 CONFIG_UART_CONSOLE=y
 CONFIG_GPIO=y
+
+CONFIG_GPIO_AS_PINRESET=y
+CONFIG_PINCTRL=y

Error:

west build -p always -b esp32c3_devkitm samples/subsys/display/lvgl -- -DSHIELD="st7735r_ada_160x128" 
-- west build: making build dir /data/2023/src/esp32c3/zephyr-westbuild/zz/build pristine
-- west build: generating a build system
Loading Zephyr default modules (Zephyr base).
-- Application: /data/2023/src/esp32c3/zephyr-westbuild/zz/samples/subsys/display/lvgl
-- CMake version: 3.21.1
-- Found Python3: /root/zephyrproject/.venv/bin/python3.10 (found suitable exact version "3.10.12") found components: Interpreter 
-- Cache files will be written to: /root/.cache/zephyr
-- Zephyr version: 3.4.99 (/data/2023/src/esp32c3/zephyr-westbuild/zephyr)
-- Found west (found suitable version "1.1.0", minimum required is "0.14.0")
-- Board: esp32c3_devkitm
-- Shield(s): st7735r_ada_160x128
-- ZEPHYR_TOOLCHAIN_VARIANT not set, trying to locate Zephyr SDK
-- Found host-tools: zephyr 0.16.1 (/opt/zephyr-sdk-0.16.1)
-- Found toolchain: zephyr 0.16.1 (/opt/zephyr-sdk-0.16.1)
-- Found Dtc: /opt/zephyr-sdk-0.16.1/sysroots/x86_64-pokysdk-linux/usr/bin/dtc (found suitable version "1.6.0", minimum required is "1.4.6") 
-- Found BOARD.dts: /data/2023/src/esp32c3/zephyr-westbuild/zephyr/boards/riscv/esp32c3_devkitm/esp32c3_devkitm.dts
-- Found devicetree overlay: /data/2023/src/esp32c3/zephyr-westbuild/zephyr/boards/shields/st7735r/st7735r_ada_160x128.overlay
devicetree error: /data/2023/src/esp32c3/zephyr-westbuild/zephyr/boards/shields/st7735r/st7735r_ada_160x128.overlay:13 (column 1): parse error: undefined node label 'arduino_spi'
-- In: /data/2023/src/esp32c3/zephyr-westbuild/zz/build/zephyr, command: /root/zephyrproject/.venv/bin/python3.10;/data/2023/src/esp32c3/zephyr-westbuild/zephyr/scripts/dts/gen_defines.py;--dts;/data/2023/src/esp32c3/zephyr-westbuild/zz/build/zephyr/zephyr.dts.pre;--dtc-flags;'';--bindings-dirs;/data/2023/src/esp32c3/zephyr-westbuild/zephyr/dts/bindings;--header-out;/data/2023/src/esp32c3/zephyr-westbuild/zz/build/zephyr/include/generated/devicetree_generated.h.new;--dts-out;/data/2023/src/esp32c3/zephyr-westbuild/zz/build/zephyr/zephyr.dts.new;--edt-pickle-out;/data/2023/src/esp32c3/zephyr-westbuild/zz/build/zephyr/edt.pickle;--vendor-prefixes;/data/2023/src/esp32c3/zephyr-westbuild/zephyr/dts/bindings/vendor-prefixes.txt
CMake Error at /data/2023/src/esp32c3/zephyr-westbuild/zephyr/cmake/modules/dts.cmake:276 (message):
  gen_defines.py failed with return code: 1
Call Stack (most recent call first):
  /data/2023/src/esp32c3/zephyr-westbuild/zephyr/cmake/modules/zephyr_default.cmake:129 (include)
  /data/2023/src/esp32c3/zephyr-westbuild/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:66 (include)
  /data/2023/src/esp32c3/zephyr-westbuild/zephyr/share/zephyr-package/cmake/ZephyrConfig.cmake:92 (include_boilerplate)
  CMakeLists.txt:5 (find_package)


-- Configuring incomplete, errors occurred!
FATAL ERROR: command exited with status 1: /usr/local/bin/cmake -DWEST_PYTHON=/root/zephyrproject/.venv/bin/python3 -B/data/2023/src/esp32c3/zephyr-westbuild/zz/build -GNinja -DBOARD=esp32c3_devkitm -DSHIELD=st7735r_ada_160x128 -S/data/2023/src/esp32c3/zephyr-westbuild/zz/samples/subsys/display/lvgl

'arduino_spi' is missed and I have no idea on how to fix it correctly.

0 replies

faxe1008 · 2023-08-23T15:30:32Z

faxe1008
Aug 23, 2023
Collaborator

Yeah the esp32c3 does not have the arduino_spi node. The shield assumes pin compatibility. Instead of using the shield you should just use the display directly on your overlay.

0 replies

weiyshay · 2023-08-24T09:26:46Z

weiyshay
Aug 24, 2023
Author

Thank you for your feedback.

Confused on the 'SPI' configuration, it seems that no specific pin ctrl definitions for all the SPI pins.
Are there specific numbers mapped to every SPI pin? like:

Relevant SPI pin definitions in esp32c3:

# grep SPI include/zephyr/dt-bindings/pinctrl/esp32c3-gpio-sigmap.h
#define ESP_SPICLK_OUT_MUX              ESP_SPICLK_OUT
#define ESP_SPIQ_IN                     0
#define ESP_SPIQ_OUT                    0
#define ESP_SPID_IN                     1
#define ESP_SPID_OUT                    1
#define ESP_SPIHD_IN                    2
#define ESP_SPIHD_OUT                   2
#define ESP_SPIWP_IN                    3
#define ESP_SPIWP_OUT                   3
#define ESP_SPICLK_OUT                  4
#define ESP_SPICS0_OUT                  5
#define ESP_FSPICLK_IN                  63
#define ESP_FSPICLK_OUT                 63
#define ESP_FSPIQ_IN                    64
#define ESP_FSPIQ_OUT                   64
#define ESP_FSPID_IN                    65
#define ESP_FSPID_OUT                   65
#define ESP_FSPIHD_IN                   66
#define ESP_FSPIHD_OUT                  66
#define ESP_FSPIWP_IN                   67
#define ESP_FSPIWP_OUT                  67
#define ESP_FSPICS0_IN                  68
#define ESP_FSPICS0_OUT                 68
#define ESP_FSPICS1_OUT                 69
#define ESP_FSPICS2_OUT                 70
#define ESP_FSPICS3_OUT                 71
#define ESP_FSPICS4_OUT                 72
#define ESP_FSPICS5_OUT                 73
#define ESP_SPICS1_OUT                  126

I searched around and found some reference code:

https://github.com/jakkra/ZSWatch/blob/main/app/boards/nrf5340dk_nrf5340_cpuapp.overlay

&spi4  {
    status = "okay";
    compatible = "nordic,nrf-spim";
    pinctrl-0 = <&spi4_default>;
    pinctrl-1 = <&spi4_sleep>;
    pinctrl-names = "default", "sleep";
    cs-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;

    gc9a01: gc9a01@0 {
        compatible = "buydisplay,gc9a01";
        status = "okay";
        spi-max-frequency = <8000000>;
        reg = <0>;
        width = <240>;
        label = "buydisplay_gc9a01";
        height = <240>;
        bl-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
        reset-gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>;
        dc-gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
    };

1 reply

weiyshay Aug 24, 2023
Author

@faxe1008
Anywhere can I find some ref code/template for a SPI display dtsi/overlay?

weiyshay · 2023-08-24T12:38:12Z

weiyshay
Aug 24, 2023
Author

A guide at:
https://blog.golioth.io/how-to-use-generic-spi-devices-with-zephyr/

0 replies

weiyshay · 2023-08-29T18:13:39Z

weiyshay
Aug 29, 2023
Author

I have tried to run the 'lvgl' sample with the following change while the display remains 'blank' and no content showed up.
Still after I run some commands via serial console. I am not sure if I am connecting the pins correctly or something related to the code.

Appreciate if any idea on how to debug.

Pin connection:

GND  <--> GND     (Pin 17)
VCC  <--> 3.3v    (Pin 18)
CLK  <--> GPIO 02 (Pin 19)
SDA  <--> GPIO 03 (Pin 20)
RST  <--> GPIO 06 (Pin 22)
DC   <--> GPIO 11 (Pin 24)
CS   <--> GPIO 07 (Pin 23)

Patch:

diff --git a/boards/shields/st7735r/st7735r_ada_160x128.overlay b/boards/shields/st7735r/st7735r_ada_160x128.overlay
index 42d7cd8906..671fda51f3 100644
--- a/boards/shields/st7735r/st7735r_ada_160x128.overlay
+++ b/boards/shields/st7735r/st7735r_ada_160x128.overlay
@@ -10,16 +10,16 @@
 	};
 };

-&arduino_spi {
+&spi2 {
 	status = "okay";
-	cs-gpios = <&arduino_header 16 GPIO_ACTIVE_LOW>;	/* D10 */
+	cs-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;

 	st7735r_st7735r_ada_160x128: st7735r@0 {
 		compatible = "sitronix,st7735r";
 		spi-max-frequency = <20000000>;
 		reg = <0>;
-		cmd-data-gpios = <&arduino_header 15 GPIO_ACTIVE_LOW>;	/* D9 */
-		reset-gpios = <&arduino_header 14 GPIO_ACTIVE_LOW>;	/* D8 */
+		cmd-data-gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
+		reset-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
 		width = <160>;
 		height = <128>;
 		x-offset = <0>;
diff --git a/samples/subsys/display/lvgl/prj.conf b/samples/subsys/display/lvgl/prj.conf
index 87a03f57cc..345489fd71 100644
--- a/samples/subsys/display/lvgl/prj.conf
+++ b/samples/subsys/display/lvgl/prj.conf
@@ -3,7 +3,7 @@ CONFIG_LV_Z_SHELL=y
 CONFIG_MAIN_STACK_SIZE=2048

 CONFIG_DISPLAY=y
-CONFIG_DISPLAY_LOG_LEVEL_ERR=y
+CONFIG_DISPLAY_LOG_LEVEL_DBG=y

 CONFIG_LOG=y
 CONFIG_SHELL=y

Build commands:

 west build -p always -b esp32c3_devkitm samples/subsys/display/lvgl/ -- -DCMAKE_EXPORT_COMPILE_COMMANDS=1  -DSHIELD="st7735r_ada_160x128"
west flash

Console output:

uart:~$ device list
devices:
- rtc@60008000 (READY)
- gpio@60004000 (READY)
- uart@60000000 (READY)
- uart@60043000 (READY)
- spi@60024000 (READY)
- st7735r@0 (READY)

uart:~$ lvgl monkey create
id   device    active
0    pointer   yes
uart:~$ lvgl monkey set 0 active
id   device    active
0    pointer   yes

uart:~$ 
[00:20:51.623,000] <dbg> display_st7735r: st7735r_write: Writing 45x25 (w,h) @ 58x103 (x,y)
[00:20:52.735,000] <dbg> display_st7735r: st7735r_write: Writing 45x25 (w,h) @ 58x103 (x,y)
[00:20:53.847,000] <dbg> display_st7735r: st7735r_write: Writing 45x25 (w,h) @ 58x103 (x,y)
[00:20:54.957,000] <dbg> display_st7735r: st7735r_write: Writing 45x25 (w,h) @ 58x103 (x,y)
[00:20:56.067,000] <dbg> display_st7735r: st7735r_write: Writing 45x25 (w,h) @ 58x103 (x,y)

0 replies

weiyshay · 2023-08-30T16:12:34Z

weiyshay
Aug 30, 2023
Author

I am suspecting that I am not setting up the pin ctrl correctly.

Some change and not working still:

Diff:

diff --git a/boards/riscv/esp32c3_devkitm/esp32c3_devkitm-pinctrl.dtsi b/boards/riscv/esp32c3_devkitm/esp32c3_devkitm-pinctrl.dtsi
index 29969c8da3..a3fe35dd7a 100644
--- a/boards/riscv/esp32c3_devkitm/esp32c3_devkitm-pinctrl.dtsi
+++ b/boards/riscv/esp32c3_devkitm/esp32c3_devkitm-pinctrl.dtsi
@@ -23,9 +23,11 @@
 
 	spim2_default: spim2_default {
 		group1 {
-			pinmux = <SPIM2_MISO_GPIO2>,
-				 <SPIM2_SCLK_GPIO6>,
-				 <SPIM2_CSEL_GPIO10>;
+			pinmux = <SPIM2_MOSI_GPIO3>,
+				 <SPIM2_SCLK_GPIO2>,
+				 <SPIM2_CSEL_GPIO7>,
+	 			 <SPIM2_DC_GPIO11>,
+	 			 <SPIM2_RESET_GPIO06>;
 		};
 		group2 {
 			pinmux = <SPIM2_MOSI_GPIO7>;
diff --git a/boards/shields/st7735r/st7735r_ada_160x128.overlay b/boards/shields/st7735r/st7735r_ada_160x128.overlay
index 42d7cd8906..671fda51f3 100644
--- a/boards/shields/st7735r/st7735r_ada_160x128.overlay
+++ b/boards/shields/st7735r/st7735r_ada_160x128.overlay
@@ -10,16 +10,16 @@
 	};
 };
 
-&arduino_spi {
+&spi2 {
 	status = "okay";
-	cs-gpios = <&arduino_header 16 GPIO_ACTIVE_LOW>;	/* D10 */
+	cs-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
 
 	st7735r_st7735r_ada_160x128: st7735r@0 {
 		compatible = "sitronix,st7735r";
 		spi-max-frequency = <20000000>;
 		reg = <0>;
-		cmd-data-gpios = <&arduino_header 15 GPIO_ACTIVE_LOW>;	/* D9 */
-		reset-gpios = <&arduino_header 14 GPIO_ACTIVE_LOW>;	/* D8 */
+		cmd-data-gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
+		reset-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
 		width = <160>;
 		height = <128>;
 		x-offset = <0>;

diff --git a/include/dt-bindings/pinctrl/esp32c3-pinctrl.h b/include/dt-bindings/pinctrl/esp32c3-pinctrl.h
index 8ba422ad6a..7949422756 100644
--- a/include/dt-bindings/pinctrl/esp32c3-pinctrl.h
+++ b/include/dt-bindings/pinctrl/esp32c3-pinctrl.h
@@ -1082,6 +1082,9 @@
 #define SPIM2_MOSI_GPIO21 \
 	ESP32_PINMUX(21, ESP_NOSIG, ESP_FSPID_OUT)
 
+#define SPIM2_DC_GPIO11    ESP32_PINMUX(11, ESP_NOSIG, ESP_FSPID_OUT)
+#define SPIM2_RESET_GPIO06 ESP32_PINMUX(06, ESP_NOSIG, ESP_FSPID_OUT)
+
 /* SPIM2_SCLK */
 #define SPIM2_SCLK_GPIO0 \
 	ESP32_PINMUX(0, ESP_NOSIG, ESP_FSPICLK_OUT)

spi2 from generated 'dts':

		spi2: spi@60024000 {
			compatible = "espressif,esp32-spi";
			reg = < 0x60024000 0x1000 >;
			interrupts = < 0x13 >;
			interrupt-parent = < &intc >;
			clocks = < &rtc 0xb >;
			dma-clk = < 0x18 >;
			dma-host = < 0x0 >;
			status = "okay";
			#address-cells = < 0x1 >;
			#size-cells = < 0x0 >;
			pinctrl-0 = < &spim2_default >;
			pinctrl-names = "default";
			cs-gpios = < &gpio0 0x7 0x1 >;
			st7735r_st7735r_ada_160x128: st7735r@0 {
				compatible = "sitronix,st7735r";
				spi-max-frequency = < 0x1312d00 >;
				reg = < 0x0 >;
				cmd-data-gpios = < &gpio0 0xb 0x1 >;
				reset-gpios = < &gpio0 0x6 0x1 >;
				width = < 0xa0 >;
				height = < 0x80 >;
				x-offset = < 0x0 >;
				y-offset = < 0x0 >;
				madctl = < 0x60 >;
				colmod = < 0x55 >;
				vmctr1 = < 0xe >;
				pwctr1 = [ A2 02 84 ];
				pwctr2 = [ C5 ];
				pwctr3 = [ 0A 00 ];
				pwctr4 = [ 8A 2A ];
				pwctr5 = [ 8A EE ];
				frmctr1 = [ 01 2C 2D ];
				frmctr2 = [ 01 2C 2D ];
				frmctr3 = [ 01 2C 2D 01 2C 2D ];
				gamctrp1 = [ 02 1C 07 12 37 32 29 2D 29 25 2B 39 00 01 03 10 ];
				gamctrn1 = [ 03 1D 07 06 2E 2C 29 2D 2E 2E 37 3F 00 00 02 10 ];
			};
		};

1 reply

faxe1008 Aug 30, 2023
Collaborator

I did not check the pin mappings that you used, however my question remains: Why do you want to use the shield and patch things in-tree? You can create a board overlay for your application and work inside there.

set-devicetree-overlays

As for testing whether or not your pin mapping is correct, enabling CONFIG_SHELL and CONFIG_GPIO_SHELL makes it easier to verify your pins.

weiyshay · 2023-08-31T12:09:54Z

weiyshay
Aug 31, 2023
Author

I did not check the pin mappings that you used, however my question remains: Why do you want to use the shield and patch things in-tree? You can create a board overlay for your application and work inside there.

set-devicetree-overlays

@faxe1008 Thank you for your comment! I didn't know how to and I did it as below:

diff --git a/samples/subsys/display/cfb/prj.conf b/samples/subsys/display/cfb/prj.conf
index 79d9eef373..897f0c4068 100644
--- a/samples/subsys/display/cfb/prj.conf
+++ b/samples/subsys/display/cfb/prj.conf
@@ -8,3 +8,6 @@ CONFIG_LOG=y
 
 CONFIG_CFB_LOG_LEVEL_DBG=y
 CONFIG_CHARACTER_FRAMEBUFFER=y
+
+CONFIG_GPIO_SHELL=y
+CONFIG_SHELL=y

diff --git a/samples/subsys/display/cfb/boards/esp32c3_devkitm.overlay b/samples/subsys/display/cfb/boards/esp32c3_devkitm.overlay
new file mode 100644
index 0000000000..0e66eca352
--- /dev/null
+++ b/samples/subsys/display/cfb/boards/esp32c3_devkitm.overlay
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2020, Kim Bøndergaard, <[email protected]>
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/ {
+	chosen {
+		zephyr,display = &st7735r_st7735r_ada_160x128;
+	};
+};
+
+&spi2 {
+	status = "okay";
+	pinctrl-0 = <&spim2_default>;
+	status = "okay";
+	cs-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
+
+	st7735r_st7735r_ada_160x128: st7735r@0 {
+		compatible = "sitronix,st7735r";
+		spi-max-frequency = <20000000>;
+		reg = <0>;
+		cmd-data-gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
+		reset-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
+		width = <160>;
+		height = <128>;
+		x-offset = <0>;
+		y-offset = <0>;
+		madctl = <0x60>;
+		colmod = <0x55>;
+		vmctr1 = <0x0e>;
+		pwctr1 = [a2 02 84];
+		pwctr2 = [c5];
+		pwctr3 = [0a 00];
+		pwctr4 = [8a 2a];
+		pwctr5 = [8a ee];
+		frmctr1 = [01 2c 2d];
+		frmctr2 = [01 2c 2d];
+		frmctr3 = [01 2c 2d 01 2c 2d];
+		gamctrp1 = [02 1c 07 12 37 32 29 2d 29 25 2b 39 00 01 03 10];
+		gamctrn1 = [03 1d 07 06 2e 2c 29 2d 2e 2e 37 3f 00 00 02 10];
+	};
+};
diff --git a/drivers/pinctrl/pinctrl_esp32.c b/drivers/pinctrl/pinctrl_esp32.c
index ee38116045..6025605111 100644
--- a/drivers/pinctrl/pinctrl_esp32.c
+++ b/drivers/pinctrl/pinctrl_esp32.c
@@ -176,6 +176,9 @@ static int esp32_pin_configure(const uint32_t pin_mux, const uint32_t pin_cfg)
 		return -EINVAL;
 	}
 
+	printf("esp32_pin_configure(), pin_mux 0x%x, pin_num %d, sig_in 0x%x, sig_out 0x%x, pin_cfg: "
+	       "0x%x\n", pin_mux, pin_num, sig_in, sig_out, pin_cfg);
+
 	port_addr = esp32_gpio_ports_addrs[ESP32_PORT_IDX(pin_num)];
 
 	if (port_addr == ESP32_INVALID_PORT_ADDR) {

As for testing whether or not your pin mapping is correct, enabling CONFIG_SHELL and CONFIG_GPIO_SHELL makes it easier to verify your pins.

I tried gpio shell debugging and overall it works good but sometimes I still get '0' after writing '1' to a specific pin.
This can be skipped and replaced with 'printf':)

I added some debug code in st7735 and gpio driver and saw that read/write cmd/data were executed correctly overall but the screen is still white.

There is an error in the console reporting the pixel format change is not implemented:

uart:~$ 
esp32_pin_configure(), pin_mux 0x20ffc3, pin_num 3, sig_in 0x1ff, sig_out 0x41, pin_cfg: 0x0
esp32_pin_configure(), pin_mux 0x1fffc2, pin_num 2, sig_in 0x1ff, sig_out 0x3f, pin_cfg: 0x0
esp32_pin_configure(), pin_mux 0x20ffc8, pin_num 8, sig_in 0x1ff, sig_out 0x41, pin_cfg: 0x20
Failed to set required pixe*** Booting Zephyr OS build zephyr-v3.4.0-2536-gdae2a5b2975e ***
[00:00:00.259,000] <err> display_st7735r: Pixel format change not implemented
[00:00:00.259,000] <err> display_st7735r: Pixel format change not implemented

Any idea? I am suspecting that my pinmux is not configured correctly.

1 reply

faxe1008 Aug 31, 2023
Collaborator

The pixel format that the cfb sample uses is not supported by the display:
https://github.com/zephyrproject-rtos/zephyr/blob/main/drivers/display/display_st7735r.c#L298

What the sample uses:
https://github.com/zephyrproject-rtos/zephyr/blob/main/samples/subsys/display/cfb/src/main.c#L28C30-L28C30

weiyshay · 2023-08-31T17:29:51Z

weiyshay
Aug 31, 2023
Author

The pixel format that the cfb sample uses is not supported by the display: https://github.com/zephyrproject-rtos/zephyr/blob/main/drivers/display/display_st7735r.c#L298

What the sample uses: https://github.com/zephyrproject-rtos/zephyr/blob/main/samples/subsys/display/cfb/src/main.c#L28C30-L28C30

Exactly, I was using sample 'cfb' instead of 'lgvl'. I tried hacking the 'RGB565' but it didn't work still,
so does 'lvgl' use RGB565 as well, like before.

It seems that the driver functions are executed successfully regarding spi operations. I tried to disconnect all
the pins and run the sample but no complain reported. Is this as expected? Anywhere I can check SPI errors?

Diff:

diff --git a/samples/subsys/display/cfb/src/main.c b/samples/subsys/display/cfb/src/main.c
index 45369d7ffa..be9ec7771a 100644
--- a/samples/subsys/display/cfb/src/main.c
+++ b/samples/subsys/display/cfb/src/main.c
@@ -18,6 +18,7 @@ int main(void)
 	uint8_t ppt;
 	uint8_t font_width;
 	uint8_t font_height;
+	int ret;
 
 	dev = DEVICE_DT_GET(DT_CHOSEN(zephyr_display));
 	if (!device_is_ready(dev)) {
@@ -25,7 +26,7 @@ int main(void)
 		return 0;
 	}
 
-	if (display_set_pixel_format(dev, PIXEL_FORMAT_MONO10) != 0) {
+	if (display_set_pixel_format(dev, PIXEL_FORMAT_RGB_565) != 0) {
 		if (display_set_pixel_format(dev, PIXEL_FORMAT_MONO01) != 0) {
 			printf("Failed to set required pixel format");
 			return 0;
@@ -71,17 +72,16 @@ int main(void)
 	while (1) {
 		for (int i = 0; i < MIN(x_res, y_res); i++) {
 			cfb_framebuffer_clear(dev, false);
-			if (cfb_print(dev,
-				      "0123456789mMgj!\"§$%&/()=",
-				      i, i)) {
-				printf("Failed to print a string\n");
+			ret = cfb_print(dev, "0123456789mMgj!\"§$%&/()=", i, i);
+
+			if (ret) {
+				printf("Failed to print a string, ret = %d\n", ret);
+				k_sleep(K_MSEC(5000));
 				continue;
 			}
 
 			cfb_framebuffer_finalize(dev);
-#if defined(CONFIG_ARCH_POSIX)
-			k_sleep(K_MSEC(20));
-#endif
+			k_sleep(K_MSEC(5000));
 		}
 	}
 	return 0;

0 replies

KimBP · 2023-08-31T20:16:09Z

KimBP
Aug 31, 2023

I don't really know if it works as I have neither an display board nor an esp32c3 board, but what I just tried was adding an overlay file in sample/subsys/display/lvgl/boards and made a build.

Content of the overlay file (named esp32c3_devkitm.overlay)

/ {
        chosen {
                zephyr,display = &st7735r;
        };
};

&spi2 {

        st7735r: st7735r@0 {
                compatible = "sitronix,st7735r";
                spi-max-frequency = <20000000>;
                reg = <0>;
                cmd-data-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;  /* GPIO6 */
                reset-gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;     /* GPIO11 */
                width = <160>;
                height = <128>;
                x-offset = <0>;
                y-offset = <0>;
                madctl = <0x60>;
                colmod = <0x55>;
                vmctr1 = <0x0e>;
                pwctr1 = [a2 02 84];
                pwctr2 = [c5];
                pwctr3 = [0a 00];
                pwctr4 = [8a 2a];
                pwctr5 = [8a ee];
                frmctr1 = [01 2c 2d];
                frmctr2 = [01 2c 2d];
                frmctr3 = [01 2c 2d 01 2c 2d];
                gamctrp1 = [02 1c 07 12 37 32 29 2d 29 25 2b 39 00 01 03 10];
                gamctrn1 = [03 1d 07 06 2e 2c 29 2d 2e 2e 37 3f 00 00 02 10];
        };
};

I then made the build like

west build -b esp32c3_devkitm -d build.lvgl zephyr/samples/subsys/display/lvgl/

Notice that I kept the default SPI pins setup for the board. I added cmd-data pin on GPIO6 and reset pin on GPIO11. Easy to change like you have already done.

But I can't tell if the display works though

0 replies

weiyshay · 2023-09-01T05:23:57Z

weiyshay
Sep 1, 2023
Author

Tim,
Thank you very much for your comments!

The difference between your overlay and mine might be the pin mapping/mux.
I will give it a try later on.

0 replies

weiyshay · 2023-09-16T15:55:52Z

weiyshay
Sep 16, 2023
Author

It turns out that the DC pin is not working correctly on GPIO11.

It works after changing it to GPIO5, thank you very much!


DC   <--> GPIO 5 (Pin 27)

0 replies

botbotty · 2023-12-09T17:52:40Z

botbotty
Dec 9, 2023

Hi @weiyshay, I'm trying to bring up the same st7735 display on the same board (luatos esp32c3).
I have tried to apply your changes, but the display is still blank.
Could you please share your complete patch that works? Thanks!

My pin connection:

GND  <--> GND     (Pin 17)
VCC  <--> 3.3v    (Pin 18)
CLK  <--> GPIO 02 (Pin 19)
SDA  <--> GPIO 03 (Pin 20)
RST  <--> GPIO 06 (Pin 22)
DC   <--> GPIO 05 (Pin 27)
CS   <--> GPIO 07 (Pin 23)

My changes:

diff --git a/boards/riscv/esp32c3_luatos_core/esp32c3_luatos_core-pinctrl.dtsi b/boards/riscv/esp32c3_luatos_core/esp32c3_luatos_core-pinctrl.dtsi
index c775009d8d..e250b4aa17 100644
--- a/boards/riscv/esp32c3_luatos_core/esp32c3_luatos_core-pinctrl.dtsi
+++ b/boards/riscv/esp32c3_luatos_core/esp32c3_luatos_core-pinctrl.dtsi
@@ -22,9 +22,11 @@
 
 	spim2_default: spim2_default {
 		group1 {
-			pinmux = <SPIM2_MISO_GPIO2>,
-				<SPIM2_SCLK_GPIO6>,
-				<SPIM2_CSEL_GPIO10>;
+			pinmux = <SPIM2_MOSI_GPIO3>,
+				 <SPIM2_SCLK_GPIO2>,
+				 <SPIM2_CSEL_GPIO7>,
+				 <SPIM2_DC_GPIO5>,
+				 <SPIM2_RESET_GPIO6>;
 		};
 		group2 {
 			pinmux = <SPIM2_MOSI_GPIO7>;
diff --git a/samples/subsys/display/cfb/boards/esp32c3_luatos_core.overlay b/samples/subsys/display/cfb/boards/esp32c3_luatos_core.overlay
new file mode 100644
index 0000000000..97f2bb2dbd
--- /dev/null
+++ b/samples/subsys/display/cfb/boards/esp32c3_luatos_core.overlay
@@ -0,0 +1,43 @@
+/*
+ * Copyright (c) 2020, Kim Bøndergaard, <[email protected]>
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/ {
+	chosen {
+		zephyr,display = &st7735r_st7735r_ada_160x128;
+	};
+};
+
+&spi2 {
+	status = "okay";
+	pinctrl-0 = <&spim2_default>;
+	status = "okay";
+	cs-gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
+
+	st7735r_st7735r_ada_160x128: st7735r@0 {
+		compatible = "sitronix,st7735r";
+		spi-max-frequency = <20000000>;
+		reg = <0>;
+		cmd-data-gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
+		reset-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
+		width = <160>;
+		height = <128>;
+		x-offset = <0>;
+		y-offset = <0>;
+		madctl = <0x60>;
+		colmod = <0x55>;
+		vmctr1 = <0x0e>;
+		pwctr1 = [a2 02 84];
+		pwctr2 = [c5];
+		pwctr3 = [0a 00];
+		pwctr4 = [8a 2a];
+		pwctr5 = [8a ee];
+		frmctr1 = [01 2c 2d];
+		frmctr2 = [01 2c 2d];
+		frmctr3 = [01 2c 2d 01 2c 2d];
+		gamctrp1 = [02 1c 07 12 37 32 29 2d 29 25 2b 39 00 01 03 10];
+		gamctrn1 = [03 1d 07 06 2e 2c 29 2d 2e 2e 37 3f 00 00 02 10];
+	};
+};
diff --git a/samples/subsys/display/cfb/src/main.c b/samples/subsys/display/cfb/src/main.c
index 45369d7ffa..99617ca42a 100644
--- a/samples/subsys/display/cfb/src/main.c
+++ b/samples/subsys/display/cfb/src/main.c
@@ -18,6 +18,7 @@ int main(void)
 	uint8_t ppt;
 	uint8_t font_width;
 	uint8_t font_height;
+	int ret;
 
 	dev = DEVICE_DT_GET(DT_CHOSEN(zephyr_display));
 	if (!device_is_ready(dev)) {
@@ -25,7 +26,7 @@ int main(void)
 		return 0;
 	}
 
-	if (display_set_pixel_format(dev, PIXEL_FORMAT_MONO10) != 0) {
+	if (display_set_pixel_format(dev, PIXEL_FORMAT_RGB_565) != 0) {
 		if (display_set_pixel_format(dev, PIXEL_FORMAT_MONO01) != 0) {
 			printf("Failed to set required pixel format");
 			return 0;
@@ -71,10 +72,10 @@ int main(void)
 	while (1) {
 		for (int i = 0; i < MIN(x_res, y_res); i++) {
 			cfb_framebuffer_clear(dev, false);
-			if (cfb_print(dev,
-				      "0123456789mMgj!\"§$%&/()=",
-				      i, i)) {
-				printf("Failed to print a string\n");
+			ret = cfb_print(dev, "0123456789mMgj!\"§$%&/()=", i, i);
+			if (ret) {
+				printf("Failed to print a string, ret = %d\n", ret);
+				k_sleep(K_MSEC(5000));
 				continue;
 			}
 
@@ -82,6 +83,7 @@ int main(void)
 #if defined(CONFIG_ARCH_POSIX)
 			k_sleep(K_MSEC(20));
 #endif
+			k_sleep(K_MSEC(5000));
 		}
 	}
 	return 0;

diff --git a/include/dt-bindings/pinctrl/esp32c3-pinctrl.h b/include/dt-bindings/pinctrl/esp32c3-pinctrl.h
index b13f54213f..2fae08244b 100644
--- a/include/dt-bindings/pinctrl/esp32c3-pinctrl.h
+++ b/include/dt-bindings/pinctrl/esp32c3-pinctrl.h
@@ -1618,6 +1618,12 @@
 #define SPIM2_SCLK_GPIO21 \
 	ESP32_PINMUX(21, ESP_NOSIG, ESP_FSPICLK_OUT)
 
+#define SPIM2_DC_GPIO5 \
+	ESP32_PINMUX(5, ESP_NOSIG, ESP_FSPID_OUT)
+
+#define SPIM2_RESET_GPIO6 \
+	ESP32_PINMUX(6, ESP_NOSIG, ESP_FSPID_OUT)
+
 /* TWAI_BUS_OFF */
 #define TWAI_BUS_OFF_GPIO0 \
 	ESP32_PINMUX(0, ESP_NOSIG, ESP_TWAI_BUS_OFF_ON)

Generated zephyr.dts:

/dts-v1/;

/ {
	#address-cells = < 0x1 >;
	#size-cells = < 0x1 >;
	model = "esp32c3_luatos_core";
	compatible = "espressif,esp32c3";
	aliases {
		die-temp0 = &coretemp;
		sw0 = &user_button1;
		i2c-0 = &i2c0;
		watchdog0 = &wdt0;
		led0 = &led_d4;
		led1 = &led_d5;
	};
	chosen {
		zephyr,canbus = &twai;
		zephyr,entropy = &trng0;
		zephyr,flash-controller = &flash;
		zephyr,sram = &sram0;
		zephyr,console = &uart0;
		zephyr,shell-uart = &uart0;
		zephyr,flash = &flash0;
		zephyr,display = &st7735r_st7735r_ada_160x128;
	};
	cpus {
		#address-cells = < 0x1 >;
		#size-cells = < 0x0 >;
		cpu0: cpu@0 {
			device_type = "cpu";
			compatible = "espressif,riscv";
			riscv,isa = "rv32imc_zicsr";
			reg = < 0x0 >;
			cpu-power-states = < &light_sleep &deep_sleep >;
			clock-frequency = < 0x9896800 >;
		};
		power-states {
			light_sleep: light_sleep {
				compatible = "zephyr,power-state";
				power-state-name = "standby";
				min-residency-us = < 0xc8 >;
				exit-latency-us = < 0x3c >;
				phandle = < 0x1 >;
			};
			deep_sleep: deep_sleep {
				compatible = "zephyr,power-state";
				power-state-name = "soft-off";
				min-residency-us = < 0x294 >;
				exit-latency-us = < 0x69 >;
				phandle = < 0x2 >;
			};
		};
	};
	pinctrl: pin-controller {
		compatible = "espressif,esp32-pinctrl";
		status = "okay";
		uart0_default: uart0_default {
			phandle = < 0x6 >;
			group1 {
				pinmux = < 0x37fd5 >;
				output-high;
			};
			group2 {
				pinmux = < 0xff8194 >;
				bias-pull-up;
			};
		};
		spim2_default: spim2_default {
			phandle = < 0x8 >;
			group1 {
				pinmux = < 0x20ffc3 >, < 0x1fffc2 >, < 0x227fc7 >, < 0x20ffc5 >, < 0x20ffc6 >;
			};
			group2 {
				pinmux = < 0x20ffc7 >;
				output-low;
			};
		};
		i2c0_default: i2c0_default {
			phandle = < 0x5 >;
			group1 {
				pinmux = < 0x1b0d81 >, < 0x1a8d43 >;
				bias-pull-up;
				drive-open-drain;
				output-high;
			};
		};
		twai_default: twai_default {
			phandle = < 0x7 >;
			group1 {
				pinmux = < 0x257fc4 >, < 0xff9285 >;
			};
		};
	};
	wifi: wifi {
		compatible = "espressif,esp32-wifi";
		status = "disabled";
	};
	soc {
		#address-cells = < 0x1 >;
		#size-cells = < 0x1 >;
		compatible = "simple-bus";
		ranges;
		sram0: memory@3fc7c000 {
			compatible = "mmio-sram";
			reg = < 0x3fc7c000 0x50000 >;
		};
		intc: interrupt-controller@600c2000 {
			compatible = "espressif,esp32-intc";
			#address-cells = < 0x0 >;
			#interrupt-cells = < 0x1 >;
			interrupt-controller;
			reg = < 0x600c2000 0x198 >;
			status = "okay";
			phandle = < 0x3 >;
		};
		systimer0: systimer@60023000 {
			compatible = "espressif,esp32-systimer";
			reg = < 0x60023000 0x80 >;
			interrupts = < 0x25 >;
			interrupt-parent = < &intc >;
			status = "okay";
		};
		rtc: rtc@60008000 {
			compatible = "espressif,esp32-rtc";
			reg = < 0x60008000 0x1000 >;
			xtal-freq = < 0x1 >;
			#clock-cells = < 0x1 >;
			status = "okay";
			phandle = < 0x4 >;
			rtc_timer: rtc_timer {
				compatible = "espressif,esp32-rtc-timer";
				slow-clk-freq = < 0x15f90 >;
				interrupts = < 0x1b >;
				interrupt-parent = < &intc >;
				status = "okay";
			};
		};
		flash: flash-controller@60002000 {
			compatible = "espressif,esp32-flash-controller";
			reg = < 0x60002000 0x1000 >;
			#address-cells = < 0x1 >;
			#size-cells = < 0x1 >;
			flash0: flash@0 {
				compatible = "soc-nv-flash";
				reg = < 0x0 0x400000 >;
				erase-block-size = < 0x1000 >;
				write-block-size = < 0x4 >;
				status = "okay";
				partitions {
					compatible = "fixed-partitions";
					#address-cells = < 0x1 >;
					#size-cells = < 0x1 >;
					boot_partition: partition@0 {
						label = "mcuboot";
						reg = < 0x0 0xf000 >;
						read-only;
					};
					slot0_partition: partition@10000 {
						label = "image-0";
						reg = < 0x10000 0x100000 >;
					};
					slot1_partition: partition@110000 {
						label = "image-1";
						reg = < 0x110000 0x100000 >;
					};
					scratch_partition: partition@210000 {
						label = "image-scratch";
						reg = < 0x210000 0x40000 >;
					};
					storage_partition: partition@250000 {
						label = "storage";
						reg = < 0x250000 0x6000 >;
					};
				};
			};
		};
		gpio0: gpio@60004000 {
			compatible = "espressif,esp32-gpio";
			gpio-controller;
			#gpio-cells = < 0x2 >;
			reg = < 0x60004000 0x800 >;
			interrupts = < 0x10 >;
			interrupt-parent = < &intc >;
			ngpios = < 0x1a >;
			status = "okay";
			phandle = < 0x9 >;
		};
		i2c0: i2c@60013000 {
			compatible = "espressif,esp32-i2c";
			#address-cells = < 0x1 >;
			#size-cells = < 0x0 >;
			reg = < 0x60013000 0x1000 >;
			interrupts = < 0x1d >;
			interrupt-parent = < &intc >;
			clocks = < &rtc 0x4 >;
			status = "okay";
			clock-frequency = < 0x186a0 >;
			pinctrl-0 = < &i2c0_default >;
			pinctrl-names = "default";
		};
		uart0: uart@60000000 {
			compatible = "espressif,esp32-uart";
			reg = < 0x60000000 0x400 >;
			status = "okay";
			interrupts = < 0x15 >;
			interrupt-parent = < &intc >;
			clocks = < &rtc 0x1 >;
			current-speed = < 0x1c200 >;
			pinctrl-0 = < &uart0_default >;
			pinctrl-names = "default";
		};
		uart1: uart@60010000 {
			compatible = "espressif,esp32-uart";
			reg = < 0x60010000 0x400 >;
			status = "disabled";
			interrupts = < 0x16 >;
			interrupt-parent = < &intc >;
			clocks = < &rtc 0x2 >;
			current-speed = < 0x1c200 >;
		};
		ledc0: ledc@60019000 {
			compatible = "espressif,esp32-ledc";
			pwm-controller;
			#pwm-cells = < 0x3 >;
			reg = < 0x60019000 0x1000 >;
			clocks = < &rtc 0x0 >;
			status = "disabled";
		};
		usb_serial: uart@60043000 {
			compatible = "espressif,esp32-usb-serial";
			reg = < 0x60043000 0x400 >;
			status = "disabled";
			interrupts = < 0x1a >;
			interrupt-parent = < &intc >;
			clocks = < &rtc 0x3 >;
		};
		timer0: counter@6001f000 {
			compatible = "espressif,esp32-timer";
			reg = < 0x6001f000 0x1000 >;
			group = < 0x0 >;
			index = < 0x0 >;
			interrupts = < 0x20 >;
			interrupt-parent = < &intc >;
			status = "disabled";
		};
		timer1: counter@60020000 {
			compatible = "espressif,esp32-timer";
			reg = < 0x60020000 0x1000 >;
			group = < 0x1 >;
			index = < 0x0 >;
			interrupts = < 0x22 >;
			interrupt-parent = < &intc >;
			status = "disabled";
		};
		trng0: trng@3ff700b0 {
			compatible = "espressif,esp32-trng";
			reg = < 0x3ff700b0 0x4 >;
			status = "okay";
		};
		twai: can@6002b000 {
			compatible = "espressif,esp32-twai";
			reg = < 0x6002b000 0x1000 >;
			interrupts = < 0x19 >;
			interrupt-parent = < &intc >;
			clocks = < &rtc 0xc >;
			sample-point = < 0x36b >;
			status = "disabled";
			pinctrl-0 = < &twai_default >;
			pinctrl-names = "default";
			bus-speed = < 0x1e848 >;
		};
		spi2: spi@60024000 {
			compatible = "espressif,esp32-spi";
			reg = < 0x60024000 0x1000 >;
			interrupts = < 0x13 >;
			interrupt-parent = < &intc >;
			clocks = < &rtc 0xb >;
			dma-clk = < 0x18 >;
			dma-host = < 0x0 >;
			status = "okay";
			#address-cells = < 0x1 >;
			#size-cells = < 0x0 >;
			pinctrl-0 = < &spim2_default >;
			pinctrl-names = "default";
			cs-gpios = < &gpio0 0x7 0x1 >;
			st7735r_st7735r_ada_160x128: st7735r@0 {
				compatible = "sitronix,st7735r";
				spi-max-frequency = < 0x1312d00 >;
				reg = < 0x0 >;
				cmd-data-gpios = < &gpio0 0x5 0x1 >;
				reset-gpios = < &gpio0 0x6 0x1 >;
				width = < 0xa0 >;
				height = < 0x80 >;
				x-offset = < 0x0 >;
				y-offset = < 0x0 >;
				madctl = < 0x60 >;
				colmod = < 0x55 >;
				vmctr1 = < 0xe >;
				pwctr1 = [ A2 02 84 ];
				pwctr2 = [ C5 ];
				pwctr3 = [ 0A 00 ];
				pwctr4 = [ 8A 2A ];
				pwctr5 = [ 8A EE ];
				frmctr1 = [ 01 2C 2D ];
				frmctr2 = [ 01 2C 2D ];
				frmctr3 = [ 01 2C 2D 01 2C 2D ];
				gamctrp1 = [ 02 1C 07 12 37 32 29 2D 29 25 2B 39 00 01 03 10 ];
				gamctrn1 = [ 03 1D 07 06 2E 2C 29 2D 2E 2E 37 3F 00 00 02 10 ];
			};
		};
		wdt0: watchdog@6001f048 {
			compatible = "espressif,esp32-watchdog";
			reg = < 0x6001f048 0x20 >;
			interrupts = < 0x21 >;
			interrupt-parent = < &intc >;
			clocks = < &rtc 0x6 >;
			status = "okay";
		};
		wdt1: watchdog@60020048 {
			compatible = "espressif,esp32-watchdog";
			reg = < 0x60020048 0x20 >;
			interrupts = < 0x23 >;
			interrupt-parent = < &intc >;
			clocks = < &rtc 0x7 >;
			status = "disabled";
		};
		coretemp: coretemp@60040058 {
			compatible = "espressif,esp32-temp";
			friendly-name = "coretemp";
			reg = < 0x60040058 0x4 >;
			status = "disabled";
		};
		adc0: adc@60040000 {
			compatible = "espressif,esp32-adc";
			reg = < 0x60040000 0x4 >;
			unit = < 0x1 >;
			channel-count = < 0x5 >;
			#io-channel-cells = < 0x1 >;
			status = "disabled";
		};
		adc1: adc@60040004 {
			compatible = "espressif,esp32-adc";
			reg = < 0x60040004 0x4 >;
			unit = < 0x2 >;
			channel-count = < 0x2 >;
			#io-channel-cells = < 0x1 >;
			status = "disabled";
		};
		dma: dma@6003f000 {
			compatible = "espressif,esp32-gdma";
			reg = < 0x6003f000 0x1000 >;
			#dma-cells = < 0x1 >;
			interrupts = < 0x2c 0x2d 0x2e >;
			interrupt-parent = < &intc >;
			clocks = < &rtc 0x18 >;
			dma-channels = < 0x6 >;
			dma-buf-addr-alignment = < 0x4 >;
			status = "disabled";
		};
	};
	gpio_keys {
		compatible = "gpio-keys";
		user_button1: button_1 {
			label = "User SW1";
			gpios = < &gpio0 0x9 0x11 >;
			zephyr,code = < 0xb >;
		};
	};
	leds {
		compatible = "gpio-leds";
		led_d4: led_1 {
			label = "D4";
			gpios = < &gpio0 0xc 0x0 >;
		};
		led_d5: led_2 {
			label = "D5";
			gpios = < &gpio0 0xd 0x0 >;
		};
	};
};

Console output:

Initialized st7735r@0
font width 10, font height 16
font width 15, font height 24
font width 20, font height 32
x_res 160, y_res 128, ppt 8, rows 128, cols 20
Failed to print a string, ret = -22
*** Booting Zephyr OS build zephyr-v3.5.0 ***
[00:00:00.245,000] <dbg> cfb: cfb_framebuffer_init: number of fonts 3
[00:00:00.272,000] <err> cfb: Unsupported framebuffer configuration
Failed to print a string, ret = -22
[00:00:05.276,000] <err> cfb: Unsupported framebuffer configuration
Failed to print a string, ret = -22
[00:00:10.277,000] <err> cfb: Unsupported framebuffer configuration

0 replies

Add display driver support for st7735s #61714

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weiyshay Aug 21, 2023

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Aug 21, 2023

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