i2s_mcux_sai: noisy sound with k_mem_slab buffer in external SDRAM #61966
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Hi @blemouzy , Reading your description, are you managing cache coherency with the DMA? When declaring the buffers like this for SDRAM: /* Audio buffers */
static char audio_buffers[I2S_BUF_COUNT * AUDIO_FRAME_BUF_SIZE] __aligned(4); I believe by default that SDRAM is cached. In the i.MX RT1xxx MCU architecture, the caches are for the Cortex-M7 core. Other masters in the system do not access through the cache. Which means when the DMA reads the SDRAM, it may not be the same data written to the SDRAM by the M7 core. One option is to place your audio buffers in non-cacheable memory. You can select CONFIG_NOCACHE_MEMORY=y to enable this. And then use the Another option if you wanted to keep these buffers cached, is to manage the cache coherency in your app. That means after the M7 core writes the buffers, and before the DMA reads the buffers, flush the cache by calling DCACHE_CleanByRange() in the MCUXpresso HAL. And if the DMA writes to the buffers, before the M7 core reads the buffers, call DCACHE_InvalidateByRange(). Does that help any? |
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Hi @DerekSnell ,
Oh yes, it does. Thanks a lot! |
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Hello, I moved my audio sample to Zephyr v3.5.0 and noisy sound is back. Several new commits are linked to memory / external SDRAM (c3dfc22, 7e646b5, c85d3dd) but I don't understand what I have to do to make Is there something to add to board device tree? |
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Hi @blemouzy ,
When I see issues like this where things work great from internal non-cached TCMs, but not from cached external memory, my initial thoughts are either a performance bottleneck with the external memory, or issues related to cache.
Reading your description, are you managing cache coherency with the DMA? When declaring the buffers like this for SDRAM:
I believe by default that SDRAM is cached. In the i.MX RT1xxx MCU architecture, the caches are for the Cortex-M7 core. Other masters in the system do not access through the cache. Which means when the DMA reads the SDRAM, it may not …