STM32F745VET FMC address read fail

[kookoo2997]

Hello.
There's no example for FMC, so I'm suffered long time.

My core MCU is STM32F745VET and using Zephyr 3.2.
I made a simple driver for FMC ethernet driver, NIC known as DAVICOM DM9006.

Here's some information and what I did for FMC ethernet.

and this is part of fmc dts node.

&fmc {
        pinctrl-0 = <&fmc_nwe_pd5 &fmc_noe_pd4 &fmc_ne1_pd7
                &fmc_d0_pd14 &fmc_d1_pd15 &fmc_a16_pd11
                &fmc_d2_pd0 &fmc_d3_pd1 &fmc_d4_pe7 &fmc_d5_pe8 &fmc_d6_pe9
                &fmc_d7_pe10 &fmc_d8_pe11 &fmc_d9_pe12 &fmc_d10_pe13
                &fmc_d11_pe14 &fmc_d12_pe15 &fmc_d13_pd8 &fmc_d14_pd9
                &fmc_d15_pd10>;

        pinctrl-names = "default";
        status = "okay";

        eth_fmc_sram: sram {
                compatible = "st,stm32-fmc-nor-psram";
                #address-cells = <1>;
                #size-cells = <0>;
                status = "okay";
                label = "STM32_FMC_NOR_PSRAM";

                eth_data_bus: sram@0 {
                        #address-cells = <1>;
                        #size-cells = <0>;
                        reg = <0>;
                        st,control = <STM32_FMC_DATA_ADDRESS_MUX_DISABLE
                                           STM32_FMC_MEMORY_TYPE_SRAM
                                           STM32_FMC_NORSRAM_MEM_BUS_WIDTH_16
                                           STM32_FMC_BURST_ACCESS_MODE_DISABLE
                                           STM32_FMC_WAIT_SIGNAL_POLARITY_LOW
                                           STM32_FMC_WAIT_TIMING_BEFORE_WS
                                           STM32_FMC_WRITE_OPERATION_ENABLE
                                           STM32_FMC_WAIT_SIGNAL_DISABLE
                                           STM32_FMC_EXTENDED_MODE_DISABLE
                                           STM32_FMC_ASYNCHRONOUS_WAIT_DISABLE
                                           STM32_FMC_WRITE_BURST_DISABLE
                                           STM32_FMC_CONTINUOUS_CLOCK_SYNC_ONLY
                                           STM32_FMC_WRITE_FIFO_DISABLE
                                           STM32_FMC_PAGE_SIZE_NONE>;
                        st,timing = <2 2 3 1 0 0 STM32_FMC_ACCESS_MODE_A>;
                        st,timing-ext = <2 2 3 1 STM32_FMC_ACCESS_MODE_A>;
              };
        };
};

I'm using BANK1 NE1, and A16 for address line.
as described in reference manual, I'm using this parameters below for access FMC address.

#define FSMC_NE1_ADDR                  (0x60000000)

#define NET_BASE_ADDR                 (FSMC_NE1_ADDR)
#define NET_REG_ADDR                  (*((volatile uint16_t *) NET_BASE_ADDR))
#define NET_REG_DATA                  (*((volatile uint16_t *) (NET_BASE_ADDR | (1<<17)) ))

and I tried to read most simple register which show vendor ID & product ID.

uint8_t DM9k_ior(uint8_t reg)
{
        NET_REG_ADDR = reg;
        return NET_REG_DATA;
}

static int dm9006_init(const struct device *dev)
{
        uint8_t vid1, vid2, pid1, pid2;

        vid1 = DM9k_ior(VID) & 0xFF;
        vid2 = DM9k_ior(VID+1) & 0xFF;
        pid1 = DM9k_ior(PID) & 0xFF;
        pid2 = DM9k_ior(PID+1) & 0xFF;

        printk("vid %02x%02x, pid %02x%02x\n", vid1, vid2, pid1, pid2);
}

But the result shows only 0 like below.

I referenced official manual and datasheet,
and other FMC sources something like BSP, lwip etc.

and also find FMC LCD things on zephyr. https://github.com/zephyrproject-rtos/zephyr/pull/45654/files

Is there something I can do for FMC?

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[erwango]

I've converted this to discussion, to first clarify the need and direction..

Is there something I can do for FMC?

I guess @GeorgeCGV you would have a good view on this.
What direction would you suggest ?

[kookoo2997]

Dear @erwango @GeorgeCGV .

This is description how to write data to Ethernet I/C.

and this is the waveform from STM32F745.

I think NWE has problem. when NWE going UP & DOWN(RED rectangle), data lines become cleared, and I think ETH I/C recognize the data as 0x0.

Here is another waveform that control FMC lines by using GPIO API.

as you see, I can get data from ETH I/C when using GPIO API.

I think there're two problems that

1. NWE goes UP & DOWN repeatly(RED rectangle in second image), how can I get rid of them?
2. CS maintains low too long, I tested various parameters of fmc property "st,timing" in .dts, but no effect.

Thank you for reading.

[kookoo2997]

I suceessed to get correct waveform and result via using STM CubeMX and CubeIDE.


result value is decimal type.(70 = 0x46, 10 = 0x0A)

This is the option of STM CubeMX FMC what I used.

So I checked whole configurations on Zephyr and CubeIDE code, but still has problem with Zephyr.
I also checked HAL SRAM driver but I cannot find any differences.

[GeorgeCGV]

@kookoo2997 the FMC initialization in Zephyr is HAL based and it is pretty much a direct mapping from DT to the HAL structs. Therefore, not a lot of things to go wrong with it.

If the configuration matches with Cube's and the timings are correct, then the only parts to check are:

• MPU - custom memory region can be defined in DT with suitable address, size, and attributes.
  For example, a display's region could be defined as:

  psram: psram@64000000 {
          compatible = "zephyr,memory-region", "mmio-sram";
          reg = <0x64000000 DT_SIZE_M(64)>;
          zephyr,memory-region  = "PSRAM2";
          zephyr,memory-attr = <( DT_MEM_ARM(ATTR_MPU_IO) )>;
  };
  

• Cache - barriers should help. There was some effort to create an API - Introducing a new barriers API #57439.
  As a quick try:

  uint8_t DM9k_ior(uint8_t reg)
  {
          NET_REG_ADDR = reg;
          __DSB();
          uint8_t ret = NET_REG_DATA;
          __DSB();
          return ret;
  }
  

There is no abstraction for the FMC. That means drivers have to care about low-level things. That is pretty much the reason why #45654 has stalled.

[GeorgeCGV]

Note: FMC was tested on H7. It might be that F7 has some not-addressed differences.

[kookoo2997]

Thanks for your advice.

I tried suggested solutions but it does not work.

It still works like

Do you have any ideas why NWE works like this? I think it contains too many noises which cannot see in Cube test codes.

Every paramters of Zephyr DT matches with CubeIDE.
And I updated Zephyr STM cube API to the latest commit.

[kookoo2997]

Finally I make it work, but I do not understand clearly why this works.

Here is what I did.

1. Add CONFIG_USE_STM32_HAL_CORTEX and CPU_HAS_CUSTOM_FIXED_SOC_MPU_REGIONS

diff --git a/soc/arm/st_stm32/stm32f7/Kconfig.series b/soc/arm/st_stm32/stm32f7/Kconfig.series
index 860aea7e..723a6ecf 100644
--- a/soc/arm/st_stm32/stm32f7/Kconfig.series
+++ b/soc/arm/st_stm32/stm32f7/Kconfig.series
@@ -12,6 +12,8 @@ config SOC_SERIES_STM32F7X
        select SOC_FAMILY_STM32
        select HAS_STM32CUBE
        select CPU_HAS_ARM_MPU
+       select USE_STM32_HAL_CORTEX
        select HAS_SWO
+       select CPU_HAS_CUSTOM_FIXED_SOC_MPU_REGIONS
        help
          Enable support for STM32F7 MCU series

I got inspiration from #62841 (reply in thread) , so I compared configrations between STM32H7 and STM32F7.
and found different Kernel options above for use MPU HAL driver. so I added them to stm32f7.

2. Add mpu_regions.c to stm32f7.
   In soc/arm/st_stm32/stm32h7, there's mpu_config.c, so I copied and pasted to soc/arm/st_stm32/stm32f7/. and modified CMakelists to make it compiled.

3. Add MPU_Config to driver source.
   In the STM32CubeIDE source, there's mpu config function like below.

void MPU_Config(void)
{
  MPU_Region_InitTypeDef MPU_InitStruct = {0};

  /* Disables the MPU */
  HAL_MPU_Disable();

  /** Initializes and configures the Region and the memory to be protected
  */
  MPU_InitStruct.Enable = MPU_REGION_ENABLE;
  MPU_InitStruct.Number = MPU_REGION_NUMBER0;
  MPU_InitStruct.BaseAddress = 0x0;
  MPU_InitStruct.Size = MPU_REGION_SIZE_4GB;
  MPU_InitStruct.SubRegionDisable = 0x87;
  MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;
  MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;
  MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE;
  MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE;
  MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE;
  MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;

  HAL_MPU_ConfigRegion(&MPU_InitStruct);
  /* Enables the MPU */
  HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
}

I added this code to drivers/.../my_driver.c.
Without this process, FMC does not work like what I suppose.

After that, I flashed to STM32F745VET custom board, and got the result what I want.

Then again, I dont know clearly why and how this solution works... but wish that this can be some help when add FMC stuff to another STM32F MCU series.

[erwango]

Thanks @kookoo2997 for this work and sharing your findings.
Don't hesitate to open an issue linked to this discussion so that we can analyse, find out the real issue and eventually fix it upstream.