Adding support for visionfive2

[kanakshilledar]

I and @pfarwsi are working on adding support for Starfive Visionfive 2 based on the JH7110 SoC.

There is support for the SoC family of JH71xx family. We started with an empty device tree and gradually started adding support for uart.
Our work is in the visionfive2 branch at https://github.com/pfarwsi/zephyr-visionfive2.git

Build instructions:

$ git clone https://github.com/pfarwsi/zephyr-visionfive2.git -b visionfive2
$ west build -p always -b visionfive2_jh7110 samples/hello_world/

Our build fails with

[8/93] Building C object zephyr/CMakeFiles/offsets.dir/arch/riscv/core/offsets/offsets.c.obj
FAILED: zephyr/CMakeFiles/offsets.dir/arch/riscv/core/offsets/offsets.c.obj

The whole build log is available on pastebin: https://pastebin.com/RN0ym1UG

We are unsure on how to proceed further with this error.
Any pointers would be helpful.

Thank You!

[kanakshilledar]

New updates!
I removed the jh7110 devicetree completely and started from scratch dts/riscv/starfive/jh7110-visionfive-v2.dtsi

/dts-v1/;

/ {
        model = "StarFive VisionFive V2";
                compatible = "starfive,visionfive-v2", "starfive,jh7110";
};

The build proceeds till the step Linking C executable zephyr/zephyr_pre0.elf before it errors out.

I have upstreamed the commit here

Build Instructions

$ git clone https://github.com/pfarwsi/zephyr-visionfive2.git -b visionfive2
$ west build -p always -b visionfive2_jh7110 samples/hello_world/

The build fails with

[85/90] Linking C executable zephyr/zephyr_pre0.elf
FAILED: zephyr/zephyr_pre0.elf zephyr/zephyr_pre0.map /home/kanak/zephyrproject/zephyr/build/zephyr/zephyr_pre0.map
: && ccache /home/kanak/zephyr-sdk-0.16.3/riscv64-zephyr-elf/bin/riscv64-zephyr-elf-gcc  -gdwarf-4 zephyr/CMakeFiles/zephyr_pre0.dir/misc/empty_file.c.obj -o zephyr/zephyr_pre0.elf  zephyr/CMakeFiles/offsets.dir/./arch/riscv/core/offsets/offsets.c.obj  -fuse-ld=bfd  -T  zephyr/linker_zephyr_pre0.cmd  -Wl,-Map=/home/kanak/zephyrproject/zephyr/build/zephyr/zephyr_pre0.map  -Wl,--whole-archive  app/libapp.a  zephyr/libzephyr.a  zephyr/arch/common/libarch__common.a  zephyr/arch/arch/riscv/core/libarch__riscv__core.a  zephyr/lib/libc/picolibc/liblib__libc__picolibc.a  zephyr/lib/libc/common/liblib__libc__common.a  zephyr/drivers/timer/libdrivers__timer.a  -Wl,--no-whole-archive  zephyr/kernel/libkernel.a  -L"/home/kanak/zephyr-sdk-0.16.3/riscv64-zephyr-elf/bin/../lib/gcc/riscv64-zephyr-elf/12.2.0/rv64imac_zicsr_zifencei/lp64/medany"  -L/home/kanak/zephyrproject/zephyr/build/zephyr  -lgcc  zephyr/arch/common/libisr_tables.a  -mcmodel=medany  -mabi=lp64  -march=rv64imac_zicsr_zifencei  -Wl,--gc-sections  -Wl,--build-id=none  -Wl,--sort-common=descending  -Wl,--sort-section=alignment  -Wl,-u,_OffsetAbsSyms  -Wl,-u,_ConfigAbsSyms  -nostdlib  -static  -Wl,-X  -Wl,-N  -Wl,--orphan-handling=warn  -Wl,-no-pie  -DPICOLIBC_LONG_LONG_PRINTF_SCANF  --specs=picolibc.specs  -lc  -lgcc && cd /home/kanak/zephyrproject/zephyr/build/zephyr && /usr/bin/cmake -E true
/home/kanak/zephyr-sdk-0.16.3/riscv64-zephyr-elf/bin/../lib/gcc/riscv64-zephyr-elf/12.2.0/../../../../riscv64-zephyr-elf/bin/ld.bfd: invalid origin for memory region ROM
/home/kanak/zephyr-sdk-0.16.3/riscv64-zephyr-elf/bin/../lib/gcc/riscv64-zephyr-elf/12.2.0/../../../../riscv64-zephyr-elf/bin/ld.bfd: invalid length for memory region ROM
/home/kanak/zephyr-sdk-0.16.3/riscv64-zephyr-elf/bin/../lib/gcc/riscv64-zephyr-elf/12.2.0/../../../../riscv64-zephyr-elf/bin/ld.bfd: zephyr/zephyr_pre0.elf section `bss' will not fit in region `RAM'
/home/kanak/zephyr-sdk-0.16.3/riscv64-zephyr-elf/bin/../lib/gcc/riscv64-zephyr-elf/12.2.0/../../../../riscv64-zephyr-elf/bin/ld.bfd:zephyr/linker_zephyr_pre0.cmd:44: undefined symbol `ROM_BASE' referenced in expression
collect2: error: ld returned 1 exit status
ninja: build stopped: subcommand failed.
FATAL ERROR: command exited with status 1: /usr/bin/cmake --build /home/kanak/zephyrproject/zephyr/build

The whole build log is available on pastebin: https://pastebin.com/LPiGQF6Y

How can I debug those invalid memory region errors?
Thanks!

[kanakshilledar]

The above devicetree issue is solved.
Thus, closing the discussion.
Thanks!

[grb72t3yde]

Hi @kanakshilledar, may I ask how the ROM_BASE issue was solved? I am currently working on the porting for Canaan Kendryte K230 and encountered the same issue. Thanks!

[kanakshilledar]

Hey!
I'm sorry as I'm still stuck at the ROM_BASE unable to move forward!
If you have any ideas we can figure this out!

[grb72t3yde]

No problem. Thank you for the prompt reply.

[grb72t3yde]

Hi, I made some progress today. The ROM_BASE macro need to be defined in the linker script, and it's value comes from your devicetree configuration. As following:

#ifdef CONFIG_XIP
#if DT_NODE_HAS_COMPAT_STATUS(DT_CHOSEN(zephyr_flash), soc_nv_flash, okay)
#ifdef CONFIG_FLASH_LOAD_OFFSET
#define ROM_BASE (DT_REG_ADDR(DT_CHOSEN(zephyr_flash)) + \
				CONFIG_FLASH_LOAD_OFFSET)
#else /* !CONFIG_FLASH_LOAD_OFFSET */
#define ROM_BASE DT_REG_ADDR(DT_CHOSEN(zephyr_flash))
#endif /* CONFIG_FLASH_LOAD_OFFSET */
#define ROM_SIZE DT_REG_SIZE(DT_CHOSEN(zephyr_flash))
#elif DT_NODE_HAS_COMPAT(DT_CHOSEN(zephyr_flash), jedec_spi_nor)
/* For jedec,spi-nor we expect the spi controller to memory map the flash
 * and for that mapping to be the second register property of the spi
 * controller.
 */
#define SPI_CTRL DT_PARENT(DT_CHOSEN(zephyr_flash))
#define ROM_BASE DT_REG_ADDR_BY_IDX(SPI_CTRL, 1)
#define ROM_SIZE DT_REG_SIZE_BY_IDX(SPI_CTRL, 1)
#endif
#else /* CONFIG_XIP */
#define ROM_BASE CONFIG_SRAM_BASE_ADDRESS
#define ROM_SIZE KB(CONFIG_SRAM_SIZE)
#endif /* CONFIG_XIP */

So, in my case, after I set the value of CONFIG_SRAM_BASE_ADDRESS by declaring a /chosen/zephyr,sram node in the devicetree and set CONFIG_XIP=n, the issue is resolved.

[kanakshilledar]

Thanks for the solution! I am able to get past that ROM_BASE error.