VisionFive 2 ROM addresses for Zephyr RTOS

[kanakshilledar]

Hello!

I and @pfarwsi are working on adding support for VisionFive 2 in Zephyr RTOS. I have created a device tree by referencing the starfive linux, patches of hifive_unmatched FU740 SoC, and patches of BeagleV Starlight.

The porting work is done in this repo: https://github.com/pfarwsi/zephyr-visionfive2/tree/visionfive2

I have created a devicetree for JH7110 SoC.

The build errors out at Linking C executable step while building for samples/hello_world.

Build Instructions:

$ git clone https://github.com/pfarwsi/zephyr-visionfive2.git -b visionfive2
$ west build -p always -b visionfive2_jh7110 samples/hello_world/

Error log:

[91/96] Linking C executable zephyr/zephyr_pre0.elf
FAILED: zephyr/zephyr_pre0.elf zephyr/zephyr_pre0.map /home/kanak/zephyrproject/zephyr/build/zephyr/zephyr_pre0.map
: && ccache /home/kanak/zephyr-sdk-0.16.3/riscv64-zephyr-elf/bin/riscv64-zephyr-elf-gcc -gdwarf-4 zephyr/CMakeFiles/zephyr_pre0.dir/misc/empty_file.c.obj -o zephyr/zephyr_pre0.elf zephyr/CMakeFiles/offsets.dir/./arch/riscv/core/offsets/offsets.c.obj -fuse-ld=bfd -T zephyr/linker_zephyr_pre0.cmd -Wl,-Map=/home/kanak/zephyrproject/zephyr/build/zephyr/zephyr_pre0.map -Wl,--whole-archive app/libapp.a zephyr/libzephyr.a zephyr/arch/common/libarch__common.a zephyr/arch/arch/riscv/core/libarch__riscv__core.a zephyr/lib/libc/picolibc/liblib__libc__picolibc.a zephyr/lib/libc/common/liblib__libc__common.a zephyr/drivers/interrupt_controller/libdrivers__interrupt_controller.a zephyr/drivers/serial/libdrivers__serial.a zephyr/drivers/timer/libdrivers__timer.a -Wl,--no-whole-archive zephyr/kernel/libkernel.a -L"/home/kanak/zephyr-sdk-0.16.3/riscv64-zephyr-elf/bin/../lib/gcc/riscv64-zephyr-elf/12.2.0/rv64imac_zicsr_zifencei/lp64/medany" -L/home/kanak/zephyrproject/zephyr/build/zephyr -lgcc zephyr/arch/common/libisr_tables.a -mcmodel=medany -mabi=lp64 -march=rv64imac_zicsr_zifencei -Wl,--gc-sections -Wl,--build-id=none -Wl,--sort-common=descending -Wl,--sort-section=alignment -Wl,-u,_OffsetAbsSyms -Wl,-u,_ConfigAbsSyms -nostdlib -static -Wl,-X -Wl,-N -Wl,--orphan-handling=warn -Wl,-no-pie -DPICOLIBC_LONG_LONG_PRINTF_SCANF --specs=picolibc.specs -lc -lgcc && cd /home/kanak/zephyrproject/zephyr/build/zephyr && /usr/bin/cmake -E true
/home/kanak/zephyr-sdk-0.16.3/riscv64-zephyr-elf/bin/../lib/gcc/riscv64-zephyr-elf/12.2.0/../../../../riscv64-zephyr-elf/bin/ld.bfd: invalid origin for memory region ROM
/home/kanak/zephyr-sdk-0.16.3/riscv64-zephyr-elf/bin/../lib/gcc/riscv64-zephyr-elf/12.2.0/../../../../riscv64-zephyr-elf/bin/ld.bfd: invalid length for memory region ROM
/home/kanak/zephyr-sdk-0.16.3/riscv64-zephyr-elf/bin/../lib/gcc/riscv64-zephyr-elf/12.2.0/../../../../riscv64-zephyr-elf/bin/ld.bfd:zephyr/linker_zephyr_pre0.cmd:44: undefined symbol 'ROM_BASE' referenced in expression
collect2: error: ld returned 1 exit status
ninja: build stopped: subcommand failed.
FATAL ERROR: command exited with status 1: /usr/bin/cmake --build /home/kanak/zephyrproject/zephyr/build

It gives error of undefined symbol for ROM_BASE.

Full build log: https://pastebin.com/JHLZrx66

Where is the memory addresses for the boards defined in Zephyr RTOS?
How can I solve the ROM_BASE issue?

Thanks!
Kanak Shilledar

[ndrs-pst]

@kanakshilledar, it seems the issue has been resolved, right?
I've successfully built the hello_world sample by integrating your port into the main repository at commit 27b1f4e.
I suspect the problem was related to this, and since you've already set CONFIG_XIP=n, that might have been the fix.

zephyr/include/zephyr/arch/riscv/common/linker.ld

Lines 39 to 60 in 6f6fc4e

	#ifdef CONFIG_XIP
	#if DT_NODE_HAS_COMPAT_STATUS(DT_CHOSEN(zephyr_flash), soc_nv_flash, okay)
	#ifdef CONFIG_FLASH_LOAD_OFFSET
	#define ROM_BASE (DT_REG_ADDR(DT_CHOSEN(zephyr_flash)) + \
	CONFIG_FLASH_LOAD_OFFSET)
	#else /* !CONFIG_FLASH_LOAD_OFFSET */
	#define ROM_BASE DT_REG_ADDR(DT_CHOSEN(zephyr_flash))
	#endif /* CONFIG_FLASH_LOAD_OFFSET */
	#define ROM_SIZE (DT_REG_SIZE(DT_CHOSEN(zephyr_flash)) - ROM_END_OFFSET)
	#elif DT_NODE_HAS_COMPAT(DT_CHOSEN(zephyr_flash), jedec_spi_nor)
	/* For jedec,spi-nor we expect the spi controller to memory map the flash
	* and for that mapping to be the second register property of the spi
	* controller.
	*/
	#define SPI_CTRL DT_PARENT(DT_CHOSEN(zephyr_flash))
	#define ROM_BASE DT_REG_ADDR_BY_IDX(SPI_CTRL, 1)
	#define ROM_SIZE (DT_REG_SIZE_BY_IDX(SPI_CTRL, 1) - ROM_END_OFFSET)
	#endif
	#else /* CONFIG_XIP */
	#define ROM_BASE CONFIG_SRAM_BASE_ADDRESS
	#define ROM_SIZE (KB(CONFIG_SRAM_SIZE) - ROM_END_OFFSET)
	#endif /* CONFIG_XIP */

[kanakshilledar]

Yes, the issue has been fixed and the sample/hello_world application is getting built successfully. CONFIG_XIP=n was missing so adding it in boards/riscv/visionfive2_jh7110/visionfive2_jh7110_defconfig fixed the issue.