Access ECSPI2 by DSP xtensa

[majidBahmanigbt]

Hi,
Hope you are well.
I want to access ECSPI2 through DSP HiFi4 in IMX8MP.
In device tree I defined ecspi2 node:

ecspi2: spi@30830000 {
	compatible = "nxp,imx-ecspi";
	reg = <0x30830000 DT_SIZE_K(64)>;
	#address-cells = <1>;
	#size-cells = <0>;
	interrupt-parent = <&clic>;
	cs-gpios = <&gpio3 16 GPIO_ACTIVE_LOW>;
	interrupts = <32 0 3>;
	clocks = <&ccm IMX_CCM_ECSPI2_CLK 0 0>;
	status = "okay";
};

And the code is:

FAILED: zephyr/isr_tables.c zephyr/isr_tables_vt.ld zephyr/isr_tables_swi.ld /home/xxxxx/nxp/Repositories/DSP_Zephyr/zephyr/build/zephyr/isr_tables.c /home/xxxxx/nxp/Repositories/DSP_Zephyr/zephyr/build/zephyr/isr_tables_vt.ld /home/xxxxx/nxp/Repositories/DSP_Zephyr/zephyr/build/zephyr/isr_tables_swi.ld 
cd /home/xxxxx/nxp/Repositories/DSP_Zephyr/zephyr/build/zephyr && /usr/bin/python3 /home/xxxxx/nxp/Repositories/DSP_Zephyr/zephyr/zephyr/scripts/build/gen_isr_tables.py --output-source isr_tables.c --linker-output-files isr_tables_vt.ld isr_tables_swi.ld --kernel /home/xxxxx/nxp/Repositories/DSP_Zephyr/zephyr/build/zephyr/zephyr_pre0.elf --intlist-section .intList --intlist-section intList --sw-isr-table
gen_isr_tables.py: error: IRQ 32 (offset=0) exceeds the maximum of 31
ninja: build stopped: subcommand failed.
FATAL ERROR: command exited with status 1: /usr/bin/cmake --build /home/xxxxx/nxp/Repositories/DSP_Zephyr/zephyr/build

I also tested with ECSPI1 and I didn’t get any compile error but when I run the code on DSP, ECSPI1 doesn’t work. It seems that something missing in my configuration because “device_is_ready” and “spi_is_ready_dt” return false:

/*
 * Copyright (c) 2016 Intel Corporation
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include <stdio.h>
#include <zephyr/kernel.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/drivers/spi.h>
#include <fsl_clock.h>


/* 1000 msec = 1 sec */
#define SLEEP_TIME_MS   1000

struct spi_dt_spec temp_spi = 
{
	.bus = DEVICE_DT_GET(DT_NODELABEL(ecspi2)),
	.config = 
	{
		.operation = SPI_OP_MODE_MASTER | SPI_TRANSFER_MSB | SPI_WORD_SET(32),
		.frequency = 1*1000*1000,
	}
};


int main(void)
{
	printk("D: %s   T: %s \r\n" , __DATE__  , __TIME__);
	int ret;
	bool led_state = true;

	if (!device_is_ready(temp_spi.bus)) {
		printf("SPI device is not ready!!\r\n");
	}else{
		printf("SPI device is ready\r\n");
	}

	if (!spi_is_ready_dt(&temp_spi)) {
		printf("SPI is not ready!!\r\n");
		return -ENODEV;
	}else{
		printf("SPI is ready\r\n");
	}

	printk("Start Routine\r\n");
	while (1) {

		uint8_t buffer_tx[3];
		const struct spi_buf tx_buf[] = {{
			.buf = buffer_tx,
			.len = ARRAY_SIZE(buffer_tx),
		}};
		const struct spi_buf_set tx = {
			.buffers = tx_buf,
			.count = ARRAY_SIZE(tx_buf),
		};

		buffer_tx[0] = 0x35;
		/* write one register */
		buffer_tx[1] = 0x35;
		buffer_tx[2] = 0x35;

		int result = spi_write_dt(&temp_spi, &tx);
		if (result != 0) {
			printf("spi_write failed with error\r\n");
			return result;
		}else{
			printf("spi_write Done\r\n");
		}
		
		led_state = !led_state;
		printf("LED state: %s\n", led_state ? "ON" : "OFF");
		k_msleep(SLEEP_TIME_MS);

	}
	return 0;
}

ECSPI1 node:

ecspi1: spi@30820000 {
	compatible = "nxp,imx-ecspi";
	reg = <0x30820000 DT_SIZE_K(64)>;
	#address-cells = <1>;
	#size-cells = <0>;
	interrupt-parent = <&clic>;
	cs-gpios = <&gpio3 16 GPIO_ACTIVE_LOW>;
	interrupts = <31 0 3>;
	clocks = <&ccm IMX_CCM_ECSPI1_CLK 0 0>;
	status = "okay";
};

I have also enabled gpio in prj.conf

CONFIG_GPIO=y
CONFIG_SPI=y

DSP Output:

Could you please tell me how I am able to solve this problem?
Thanks

[dbaluta]

I'm concerned about

gen_isr_tables.py: error: IRQ 32 (offset=0) exceeds the maximum of 31

@LaurentiuM1234 can you please look at this when you have some spare cycles.

[majidBahmanigbt]

Thank you!

[LaurentiuM1234]

Hey, @majidBahmanigbt !

Regarding the device_is_ready() issue:

I believe the device_is_ready() function returns false because the driver's init() function fails. Looking at its definition (spi_mcux_init() from drivers/spi/spi_mcux_ecspi.c) it seems like the function is trying to set the states of its assigned pins to the default one. Now, looking at the DTS node you've provided, it looks like it doesn't contain the pinctrl property which should cause the following line to fail:

ret = pinctrl_apply_state(config->pincfg, PINCTRL_STATE_DEFAULT);

Would you mind checking if this is actually the case? This should be as simple as adding a LOG_ERR (or any other printer function) in the if (ret < 0) (line 295) brackets. If that's the case then you'll need to add the pinctrl property. To create the pin groups please use the uart groups from boards/nxp/imx8mp_evk/imx8mp_evk-pinctrl.dtsi as inspiration. The pinmux phandles should be found at modules/hal/nxp/dts/nxp/nxp_imx/mimx8ml8dvnlz-pinctrl.dtsi

Regarding the interrupt-related issue:

A bit of context here: the interrupts from peripherals are not routed directly to the DSP core (exception: MU2 and MU3). Instead, they go through an IP called IRQ_STEER (for details, check out the documentation from drivers/interrupt_controller/intc_nxp_irqsteer.c)

Basically what this means is that we can't use clic as an interrupt parent for IPs whose interrupts are routed through IRQ_STEER. clic (core-level interrupt controller) is meant to be used only for peripherals whose interrupts go directly to the DSP (i.e: MU2 and MU3).

The reason you're getting the following error:

gen_isr_tables.py: error: IRQ 32 (offset=0) exceeds the maximum of 31

is because the DSP has only 32 direct interrupts (0 -> 31) and you're trying to use index 32 which doesn't exist (note: when enabling multi-level interrupts with the irqsteer driver the max number of interrupts will increase but it doesn't change the fact that indexes 0 -> 31 are for DSP direct interrupts)

So, for your example, we first need to enable the irqsteer driver. To do so, just apply the patches from #71648 (this will be upstreamed as well soon!).
After that we just need to choose which interrupt parent and index to use. drivers/interrupt_controller/intc_nxp_irqsteer.c contains an example of how this is done for SDMA3. In our case, for ecspi2 it should be something like:

ecspi2: spi@30830000 {
	interrupt-parent = <&master1>;
	interrupts = <0>;

and

ecspi1: spi@ecspi1_address_goes_here {
	interrupt-parent = <&master0>;
	interrupts = <31>;

for ECSPI1.

[majidBahmanigbt]

Hi LaurentiuM1234,

Thank you for your response.

I applied your advices. Now "device_is_ready" and "spi_is_ready_dt" return true. Today I can not test the SPI pins signal. I will test it soon and let you know.

&ecspi2 {
	status = "okay";
	pinctrl-0 = <&ecspi2_default>;
	pinctrl-names = "default";
};

&pinctrl {

	ecspi2_default: ecspi2_default {
		group0 {
			pinmux = <&iomuxc_ecspi2_miso_ecspi_miso_ecspi2_miso>,
				<&iomuxc_ecspi2_mosi_ecspi_mosi_ecspi2_mosi>,
				<&iomuxc_ecspi2_sclk_ecspi_sclk_ecspi2_sclk>,
				<&iomuxc_ecspi2_ss0_ecspi_ss_ecspi2_ss0>;
			bias-pull-up;
			slew-rate = "slow";
			drive-strength = "x1";
		};
	};
	
};

One more thing in #71648, for uart4 node, isn't it required to change

interrupts = <29 0 0>;

to

interrupts = <0>;

?
You have also mentioned about MU3 which is interconnection between CM7 and DSP. Could you please tell me if there is any sample code or document which help me to run MU3? I am really curious about it.

Many Thanks.

[majidBahmanigbt]

I tested ECSPI2. Although "spi_write_dt" is done with no error, I don't have any signal in ECSPI2 pins (MOSI, SCK, SS).
I tested many cases but I still have issue. Do you know if any other initialization required?

[LaurentiuM1234]

One more thing in #71648, for uart4 node, isn't it required to change

interrupts = <29 0 0>;

to

interrupts = <0>;

?

You're right that there's only 1 interrupts cell that should be used, but the interrupt number is 29 not 0, the rationale here being that UART4 has interrupt number 29 and belongs to master0 so the start offset is 0 (so if we decrease the start offset from the system interrupt number (29) we still get 29)

You have also mentioned about MU3 which is interconnection between CM7 and DSP. Could you please tell me if there is any sample code or document which help me to run MU3? I am really curious about it.

Not sure actually. If you're interested in the CM7-DSP interaction specifically via MU3 then maybe having a look at samples/drivers/mbox/ might prove useful? If you just want to see the IP in action, we do use MU2 for CA53-DSP communication. @iuliana-prodan can provide more details here.

I tested ECSPI2. Although "spi_write_dt" is done with no error, I don't have any signal in ECSPI2 pins (MOSI, SCK, SS).
I tested many cases but I still have issue. Do you know if any other initialization required?

Not sure if I can be of any use here as I've never messed around with this IP :(. Maybe you could look at tests/drivers/spi/spi_loopback/ for the initialization stuff (this seems to have been tested on M7 - #69230). Also, you might want to make sure that the IP clocks are set properly (maybe having a look at soc/nxp/imx/imx8m/m7/soc.c can help?). Additionally, maybe you could look at the underlying HAL functions and check if they fail somewhere? (mcux/mcux-sdk/drivers/ecspi/fsl_ecspi.c) (+ checking the IP registers)

[majidBahmanigbt]

Sorry you are right, it is interrupts = <29>; I made a mistake in writing.

About SPI, I found that it only works when I write directly to ECSPI2_TXDATA register. It seems that something wrong happens in "spi_write_dt". However, "spi_write_dt" should be called at least once otherwise, writing ECSPI2_TXDATA register would not work.

/*
 * Copyright (c) 2016 Intel Corporation
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include <stdio.h>
#include <zephyr/kernel.h>
#include <zephyr/drivers/gpio.h>
#include <zephyr/drivers/spi.h>
#include <fsl_clock.h>


/* 1000 msec = 1 sec */
#define SLEEP_TIME_MS   1000

struct spi_dt_spec temp_spi = 
{
	.bus = DEVICE_DT_GET(DT_NODELABEL(ecspi2)),
	.config = 
	{
		.operation = SPI_OP_MODE_MASTER | SPI_TRANSFER_MSB | SPI_WORD_SET(32),
		.frequency = 1*1000*1000,
	}
};


int main(void)
{
	printk("DT: %s   T: %s \r\n" , __DATE__  , __TIME__);
	int ret;
	
	long unsigned int *spi_tx_addr  = ((long unsigned int *) 0x30830004);

	if (!device_is_ready(temp_spi.bus)) {
		printf("SPI device is not ready!!\r\n");
	}else{
		printf("SPI device is ready\r\n");
	}

	if (!spi_is_ready_dt(&temp_spi)) {
		printf("SPI is not ready!!\r\n");
		return -ENODEV;
	}else{
		printf("SPI is ready\r\n");
	}

	printk("Start Routine\r\n");
	while (1) {

		uint8_t num_bytes = 3;
		uint8_t tx_bytes[16] = {0x41, 0x42, 0x43};
		const struct spi_buf tx_buf = {.buf = tx_bytes, .len = num_bytes};
		const struct spi_buf_set tx = {.buffers = &tx_buf, .count = 1};

		int result = spi_write_dt(&temp_spi, &tx);
		if (result != 0) {
			printf("spi_write failed with error\r\n");
			return result;
		}else{
			printf("spi_write Done\r\n");
		}
		
		*spi_tx_addr = 0x34353637;
		k_msleep(SLEEP_TIME_MS);

	}
	return 0;
}

Thanks

[pdgendt]

Hi @majidBahmanigbt,

Disclaimer: I am the author of the ecspi driver in zephyr.

The driver uses interrupts to transfer data in a non-blocking way, my guess is that something is wrong in that regard, that is why writing to ECSPI2_TXDATA directly has a different behavior.

However, "spi_write_dt" should be called at least once otherwise, writing ECSPI2_TXDATA register would not work.

This would be because spi_mcux_configure is called as part of the write function.