STM32H747I Flash controller

[RIPHeisenberg]

Hi everyone,

I currently started working with the STM32H747I_Discovery board. The Board is used to build a web bridge between some CAN / Modbus to the Internet. The data model is made in OPC-UA. A quite bloated protocol specification. Our data Model doesn't fit into the predefined 1Mbyte of Flash memory. And I am currently looking for ways to tackle this issue.
The straight forward approach of just increasing the Flash area to 2MB doesn't work.

&flash0 { reg = <0x08000000 DT_SIZE_K(2048)>; };

ERROR Msg:

Error: checksum mismatch - attempting binary compare

diff 0 address 0x08100000. Was 0xff instead of 0x9c
diff 1 address 0x08100001. Was 0xff instead of 0xd0
diff 2 address 0x08100002. Was 0xff instead of 0x13
diff 3 address 0x08100003. Was 0xff instead of 0x08
diff 4 address 0x08100004. Was 0xff instead of 0x00
diff 5 address 0x08100005. Was 0xff instead of 0x00
diff 6 address 0x08100006. Was 0xff instead of 0x00
diff 7 address 0x08100007. Was 0xff instead of 0x00
...

It seems as if the M7 is not allowed to write into the M4's base address.

The M7 Chip base -> 0x08000000 with 1MB size
The M4 Chip base -> 0x08100000 with 1MB size

There are a lot of option bytes defined in the reference manual. I am not sure how to interact with them using Zephyr and devicetree.
It should however be possible to change access to the flash memory from the STM32 specifications. Any help guiding me in the right direction is highly appreciated.

Best regards

[ndrs-pst]

@RIPHeisenberg STM32CubeProgrammer may help you figure out which option bytes need to be defined.
As a first try, you may disable CM4 boot and change the boot address of M4 to0x0818000. Additionally, modify the M7 entry in the DTS to:

&flash0 {
    reg = <0x08000000 DT_SIZE_K(1536)>;
};