Help to get SPI bus working on NXP Lpcxpresso55s06 - LoRa sample failed

[elfarolab]

Hello,

Target MCU is NXP LPC55S06JBD64

Introduction

I wanted to test the sample "lora_send" using the shield SX1261MB1BAS.
Zephyr supports similar shield SX1262MB2DAS which is electrically compatible.
I mounted the SX1261MB1BAS shield on 2 different Nordic semi. DK boards and the sample code works perfectly.
LoRa packets are transmitted and received at the other side running the "lora_receive" sample.

Testing LoRa sample with board Lpcxpresso55s69

Zephyr has working implementation of HS SPI bus for NXP Lpcxpresso55s69.
I prepared a custom board overlay, flashed the LoRa sample and it works, LoRa packets get transmitted.

The target board: Lpcxpresso55s06

Zephyr supports this board but the features enabled are reduced.
SPI bus implementation is not available but driver "nxp,lpc-spi" is.
The board mounts the target MCU: NXP LPC55S06JBD64.

What I tried:

I tried to enable the SPI bus following the configs files of Lpcxpresso55s69.
I did some copy/paste and added a new board overlay file.
I flashed the sample on board Lpcxpresso55s06 but no success, there is still something missing.

With a logic analyzer I tested the pins MOSI and SCK of Lpcxpresso55s06 but they are disabled.
The reset line to sx1261 stay always at LOW level. Looks like the SPI bus is not enabled.

sx126x Zephyr driver doesn't report any SPI bus error.
It follows the interfacing procedure but nothing happens at pins level.
You can read below into the debug console output: the readings from sx1261 are always 00h.

<dbg> sx126x: SX126xReadRegisters: register_value
                                 00 00 00 00 00 00 00 00  00                      |........ .    

so, SPI bus looks like is not working at all.

Can you please review my work and files below to see if I need to add or modify something?

Thank you so much everybody.

command to build:

west build -p always -b lpcxpresso55s06 .

Build process output:

-- west build: making build dir /zephyr_new_tests_freestanding/lora_send/build pristine
-- west build: generating a build system
Loading Zephyr default modules (Zephyr base).
-- Application: /zephyr_new_tests_freestanding/lora_send
-- CMake version: 3.25.1
-- Found Python3: /zephyr/env/bin/python3 (found suitable version "3.12.3", minimum required is "3.8") found components: Interpreter 
-- Cache files will be written to: /.cache/zephyr
-- Zephyr version: 3.6.99 (/SRC/zephyr/zephyr)
-- Found west (found suitable version "1.2.0", minimum required is "0.14.0")
-- Board: lpcxpresso55s06, qualifiers: lpc55s06
-- ZEPHYR_TOOLCHAIN_VARIANT not set, trying to locate Zephyr SDK
-- Found host-tools: zephyr 0.16.5 (/opt/zephyr-sdk-0.16.5-1)
-- Found toolchain: zephyr 0.16.5 (/opt/zephyr-sdk-0.16.5-1)
-- Found Dtc: /opt/zephyr-sdk-0.16.5-1/sysroots/x86_64-pokysdk-linux/usr/bin/dtc (found suitable version "1.6.0", minimum required is "1.4.6") 
-- Found BOARD.dts: /SRC/zephyr/zephyr/boards/nxp/lpcxpresso55s06/lpcxpresso55s06.dts
-- Found devicetree overlay:/zephyr_new_tests_freestanding/lora_send/boards/lpcxpresso55s06.overlay
'label' is marked as deprecated in 'properties:' in /SRC/zephyr/zephyr/dts/bindings/lora/semtech,sx1261.yaml for node /soc/peripheral@40000000/spi@9f000/sx1261@0.
-- Generated zephyr.dts: /zephyr_new_tests_freestanding/lora_send/build/zephyr/zephyr.dts
-- Generated devicetree_generated.h: /zephyr_new_tests_freestanding/lora_send/build/zephyr/include/generated/devicetree_generated.h
-- Including generated dts.cmake file: /zephyr_new_tests_freestanding/lora_send/build/zephyr/dts.cmake
Parsing /SRC/zephyr/zephyr/Kconfig
Loaded configuration '/SRC/zephyr/zephyr/boards/nxp/lpcxpresso55s06/lpcxpresso55s06_defconfig'
Merged configuration '/zephyr_new_tests_freestanding/lora_send/prj.conf'
Configuration saved to '/zephyr_new_tests_freestanding/lora_send/build/zephyr/.config'
Kconfig header saved to '/zephyr_new_tests_freestanding/lora_send/build/zephyr/include/generated/autoconf.h'
-- Found GnuLd: /opt/zephyr-sdk-0.16.5-1/arm-zephyr-eabi/arm-zephyr-eabi/bin/ld.bfd (found version "2.38") 
-- The C compiler identification is GNU 12.2.0
-- The CXX compiler identification is GNU 12.2.0
-- The ASM compiler identification is GNU
-- Found assembler: /opt/zephyr-sdk-0.16.5-1/arm-zephyr-eabi/bin/arm-zephyr-eabi-gcc
Load components for LPC55S06:
driver_common component is included.
driver_reset component is included.
device_CMSIS component is included.
CMSIS_Include_core_cm component is included.
device_system component is included.
driver_lpc_dma component is included.
driver_lpc_gpio component is included.
driver_pint component is included.
driver_inputmux component is included.
driver_inputmux_connections component is included.
driver_flexcomm component is included.
driver_flexcomm_spi component is included.
driver_flexcomm_usart component is included.
driver_lpc_iocon component is included.
-- Using ccache: /usr/bin/ccache
-- Configuring done
-- Generating done
-- Build files have been written to: /zephyr_new_tests_freestanding/lora_send/build
-- west build: building application
[1/160] Preparing syscall dependency handling

[3/160] Generating include/generated/version.h
-- Zephyr version: 3.6.99 (/SRC/zephyr/zephyr), build: v3.6.0-3398-g55c8a1650235
[160/160] Linking C executable zephyr/zephyr.elf
Memory region         Used Size  Region Size  %age Used
           FLASH:       52996 B       246 KB     21.04%
             RAM:       49104 B        80 KB     59.94%
           SRAMX:          0 GB        16 KB      0.00%
        IDT_LIST:          0 GB        32 KB      0.00%
Generating files from /zephyr_new_tests_freestanding/lora_send/build/zephyr/zephyr.elf for board: lpcxpresso55s06

board overlay file boards/lpcxpresso55s06.overlay:

#include <nxp/lpc/LPC55S06JBD64-pinctrl.h>
#include <zephyr/dt-bindings/inputmux/inputmux_trigger_ports.h>

/ {
	aliases {
            lora0 = &lora_semtech_sx1261;
            spi-8 = &hs_lspi;
	};

};

&pinctrl {
    pinmux_hs_lspi_default: pinmux_hs_lspi_default {
        group0 {
            pinmux = <HS_SPI_SSEL1_PIO1_1>,
                <HS_SPI_SCK_PIO1_2>,
                <HS_SPI_MISO_PIO1_3>,
                <HS_SPI_MOSI_PIO0_26>;
            bias-pull-up;
            slew-rate = "standard";
        };
    };
};

&hs_lspi {
    status = "okay";
    pinctrl-0 = <&pinmux_hs_lspi_default>;
    pinctrl-names = "default";
    dmas = <&dma0 2>, <&dma0 3>;
    dma-names = "rx", "tx";
    cs-gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
    
    lora_semtech_sx1261: sx1261@0 {
	    compatible = "semtech,sx1261";
	    status = "okay";
	    reg = <0>;
	    spi-max-frequency = <12000000>;
	    label = "SX1261";
	    reset-gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
	    busy-gpios = <&gpio0 23 GPIO_ACTIVE_HIGH>;
	    antenna-enable-gpios = <&gpio0 10 GPIO_ACTIVE_HIGH>;
	    dio1-gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>;
	    dio2-tx-enable;
    };

};

&peripheral {
    dma0: dma-controller@82000 {
        compatible = "nxp,lpc-dma";
        reg = <0x82000 0x1000>;
        interrupts = <1 0>;
        dma-channels = <23>;
        nxp,dma-num-of-otrigs = <4>;
        nxp,dma-otrig-base-address = <LPC55S06_DMA0_OTRIG_BASE>;
        nxp,dma-itrig-base-address = <LPC55S06_DMA0_ITRIG_BASE>;
        status = "okay";
        #dma-cells = <1>;
    };
};

&can0 {
    status = "disabled";
};

prj.conf:

CONFIG_LOG=y
CONFIG_SPI=y
CONFIG_GPIO=y
CONFIG_LORA=y
CONFIG_PRINTK=y

CONFIG_DMA=y
CONFIG_DMA_MCUX_LPC=y

CONFIG_SPI_MCUX_FLEXCOMM=y
CONFIG_SPI_MCUX_FLEXCOMM_DMA=y
#CONFIG_SPI_ASYNC=n
CONFIG_SPI_LOG_LEVEL_DBG=y

CONFIG_SERIAL=y
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
CONFIG_LOG_SPEED=y
CONFIG_LOG_BUFFER_SIZE=32768

#CONFIG_RTT_CONSOLE=y
#CONFIG_USE_SEGGER_RTT=y

CONFIG_LOG_DEFAULT_LEVEL=4
CONFIG_LOG_BACKEND_UART=y
#CONFIG_LORA_LOG_LEVEL_DBG=y

#CONFIG_PM_DEVICE=y
#CONFIG_ARM_MPU=n

build/zephyr/zephyr.dts

/dts-v1/;

/ {
	#address-cells = < 0x1 >;
	#size-cells = < 0x1 >;
	model = "NXP LPCXpresso55S06 board";
	compatible = "nxp,lpc55xxx", "nxp,lpc";
	soc {
		#address-cells = < 0x1 >;
		#size-cells = < 0x1 >;
		compatible = "simple-bus";
		interrupt-parent = < &nvic >;
		ranges;
		sram: sram@400000 {
			ranges = < 0x4000000 0x4000000 0x20000000 >;
			#address-cells = < 0x1 >;
			#size-cells = < 0x1 >;
			sramx: memory@4000000 {
				compatible = "zephyr,memory-region", "mmio-sram";
				reg = < 0x40000000 0x4000 >;
				zephyr,memory-region = "SRAMX";
			};
			sram0: memory@20000000 {
				compatible = "mmio-sram";
				reg = < 0x20000000 0x14000 >;
			};
			sram1: memory@20008000 {
				compatible = "mmio-sram";
				reg = < 0x20008000 0x4000 >;
			};
			sram2: memory@2000C000 {
				compatible = "mmio-sram";
				reg = < 0x2000c000 0x4000 >;
			};
			sram3: memory@20010000 {
				compatible = "mmio-sram";
				reg = < 0x20010000 0x4000 >;
			};
		};
		peripheral: peripheral@40000000 {
			ranges = < 0x0 0x40000000 0x10000000 >;
			#address-cells = < 0x1 >;
			#size-cells = < 0x1 >;
			syscon: syscon@0 {
				compatible = "nxp,lpc-syscon";
				reg = < 0x0 0x4000 >;
				#clock-cells = < 0x1 >;
				phandle = < 0x2 >;
			};
			iap: flash-controller@34000 {
				compatible = "nxp,iap-fmc55";
				reg = < 0x34000 0x18 >;
				status = "okay";
				#address-cells = < 0x1 >;
				#size-cells = < 0x1 >;
				flash0: flash@0 {
					compatible = "soc-nv-flash";
					reg = < 0x0 0x3d800 >;
					erase-block-size = < 0x200 >;
					write-block-size = < 0x200 >;
					partitions {
						compatible = "fixed-partitions";
						#address-cells = < 0x1 >;
						#size-cells = < 0x1 >;
						boot_partition: partition@0 {
							label = "mcuboot";
							reg = < 0x0 0x8000 >;
						};
						slot0_partition: partition@8000 {
							label = "image-0";
							reg = < 0x8000 0x18000 >;
						};
						slot1_partition: partition@20000 {
							label = "image-1";
							reg = < 0x20000 0x18000 >;
						};
						storage_partition: partition@38000 {
							label = "storage";
							reg = < 0x38000 0x5000 >;
						};
					};
				};
				flash_reserved: flash@3d800 {
					compatible = "soc-nv-flash";
					reg = < 0x3d800 0x2800 >;
					status = "disabled";
				};
				uuid: flash@9fc70 {
					compatible = "nxp,lpc-uid";
					reg = < 0x3fc70 0x10 >;
				};
				boot_rom: flash@3000000 {
					compatible = "soc-nv-flash";
					reg = < 0x3000000 0x20000 >;
				};
			};
			iocon: iocon@1000 {
				compatible = "nxp,lpc-iocon";
				reg = < 0x1000 0x100 >;
				#address-cells = < 0x1 >;
				#size-cells = < 0x1 >;
				ranges = < 0x0 0x1000 0x100 >;
				pinctrl: pinctrl {
					compatible = "nxp,lpc-iocon-pinctrl";
					pinmux_flexcomm0_usart: pinmux_flexcomm0_usart {
						phandle = < 0x3 >;
						group0 {
							pinmux = < 0x1d00001 >, < 0x1e00001 >;
							slew-rate = "standard";
						};
					};
					pinmux_can0: pinmux_can0 {
						phandle = < 0x7 >;
						group0 {
							pinmux = < 0x2300001 >, < 0x2200001 >;
							slew-rate = "standard";
						};
					};
					pinmux_hs_lspi_default: pinmux_hs_lspi_default {
						phandle = < 0x4 >;
						group0 {
							pinmux = < 0x2100005 >, < 0x2200006 >, < 0x2300006 >, < 0x1a00009 >;
							bias-pull-up;
							slew-rate = "standard";
						};
					};
				};
			};
			gpio0: gpio@0 {
				compatible = "nxp,lpc-gpio";
				reg = < 0x8c000 0x2488 >;
				int-source = "pint";
				gpio-controller;
				#gpio-cells = < 0x2 >;
				port = < 0x0 >;
				phandle = < 0x6 >;
			};
			gpio1: gpio@1 {
				compatible = "nxp,lpc-gpio";
				reg = < 0x8c000 0x2488 >;
				int-source = "pint";
				gpio-controller;
				#gpio-cells = < 0x2 >;
				port = < 0x1 >;
				phandle = < 0x8 >;
			};
			pint: pint@4000 {
				compatible = "nxp,pint";
				reg = < 0x4000 0x1000 >;
				interrupt-controller;
				#interrupt-cells = < 0x1 >;
				#address-cells = < 0x0 >;
				interrupts = < 0x4 0x2 >, < 0x5 0x2 >, < 0x6 0x2 >, < 0x7 0x2 >, < 0x20 0x2 >, < 0x21 0x2 >, < 0x22 0x2 >, < 0x23 0x2 >;
				num-lines = < 0x8 >;
				num-inputs = < 0x40 >;
			};
			flexcomm0: flexcomm@86000 {
				compatible = "nxp,lpc-usart";
				reg = < 0x86000 0x1000 >;
				interrupts = < 0xe 0x0 >;
				clocks = < &syscon 0x100 >;
				status = "okay";
				current-speed = < 0x1c200 >;
				pinctrl-0 = < &pinmux_flexcomm0_usart >;
				pinctrl-names = "default";
			};
			flexcomm1: flexcomm@87000 {
				compatible = "nxp,lpc-flexcomm";
				reg = < 0x87000 0x1000 >;
				interrupts = < 0xf 0x0 >;
				clocks = < &syscon 0x101 >;
				status = "disabled";
			};
			flexcomm2: flexcomm@88000 {
				compatible = "nxp,lpc-flexcomm";
				reg = < 0x88000 0x1000 >;
				interrupts = < 0x10 0x0 >;
				clocks = < &syscon 0x102 >;
				status = "disabled";
			};
			flexcomm3: flexcomm@89000 {
				compatible = "nxp,lpc-flexcomm";
				reg = < 0x89000 0x1000 >;
				interrupts = < 0x11 0x0 >;
				clocks = < &syscon 0x103 >;
				status = "disabled";
			};
			flexcomm4: flexcomm@8a000 {
				compatible = "nxp,lpc-flexcomm";
				reg = < 0x8a000 0x1000 >;
				interrupts = < 0x12 0x0 >;
				clocks = < &syscon 0x104 >;
				status = "disabled";
			};
			flexcomm5: flexcomm@96000 {
				compatible = "nxp,lpc-flexcomm";
				reg = < 0x96000 0x1000 >;
				interrupts = < 0x13 0x0 >;
				clocks = < &syscon 0x105 >;
				status = "disabled";
			};
			flexcomm6: flexcomm@97000 {
				compatible = "nxp,lpc-flexcomm";
				reg = < 0x97000 0x1000 >;
				interrupts = < 0x14 0x0 >;
				clocks = < &syscon 0x106 >;
				status = "disabled";
			};
			flexcomm7: flexcomm@98000 {
				compatible = "nxp,lpc-flexcomm";
				reg = < 0x98000 0x1000 >;
				interrupts = < 0x15 0x0 >;
				clocks = < &syscon 0x107 >;
				status = "disabled";
			};
			hs_lspi: spi@9f000 {
				compatible = "nxp,lpc-spi";
				reg = < 0x9f000 0x1000 >;
				interrupts = < 0x3b 0x0 >;
				clocks = < &syscon 0x10e >;
				status = "okay";
				#address-cells = < 0x1 >;
				#size-cells = < 0x0 >;
				pinctrl-0 = < &pinmux_hs_lspi_default >;
				pinctrl-names = "default";
				dmas = < &dma0 0x2 >, < &dma0 0x3 >;
				dma-names = "rx", "tx";
				cs-gpios = < &gpio0 0x2 0x1 >;
				lora_semtech_sx1261: sx1261@0 {
					compatible = "semtech,sx1261";
					status = "okay";
					reg = < 0x0 >;
					spi-max-frequency = < 0xb71b00 >;
					label = "SX1261";
					reset-gpios = < &gpio0 0x10 0x1 >;
					busy-gpios = < &gpio0 0x17 0x0 >;
					antenna-enable-gpios = < &gpio0 0xa 0x0 >;
					dio1-gpios = < &gpio0 0x13 0x0 >;
					dio2-tx-enable;
				};
			};
			can0: can@9d000 {
				compatible = "nxp,lpc-mcan";
				reg = < 0x9d000 0x1000 >;
				interrupts = < 0x2b 0x0 >, < 0x2c 0x0 >;
				interrupt-names = "int0", "int1";
				clocks = < &syscon 0x300 >;
				bosch,mram-cfg = < 0x0 0xf 0xf 0x8 0x8 0x0 0xf 0xf >;
				status = "disabled";
				bus-speed = < 0x1e848 >;
				bus-speed-data = < 0xf4240 >;
				pinctrl-0 = < &pinmux_can0 >;
				pinctrl-names = "default";
				can-transceiver {
					max-bitrate = < 0x4c4b40 >;
				};
			};
			rng: rng@3a000 {
				compatible = "nxp,lpc-rng";
				reg = < 0x3a000 0x1000 >;
				status = "okay";
			};
			dma0: dma-controller@82000 {
				compatible = "nxp,lpc-dma";
				reg = < 0x82000 0x1000 >;
				interrupts = < 0x1 0x0 >;
				dma-channels = < 0x17 >;
				nxp,dma-num-of-otrigs = < 0x4 >;
				nxp,dma-otrig-base-address = < 0x16000000 >;
				nxp,dma-itrig-base-address = < 0xe00000f >;
				status = "okay";
				#dma-cells = < 0x1 >;
				phandle = < 0x5 >;
			};
		};
		nvic: interrupt-controller@e000e100 {
			#address-cells = < 0x1 >;
			compatible = "arm,v8m-nvic";
			reg = < 0xe000e100 0xc00 >;
			interrupt-controller;
			#interrupt-cells = < 0x2 >;
			arm,num-irq-priority-bits = < 0x3 >;
			phandle = < 0x1 >;
		};
		systick: timer@e000e010 {
			compatible = "arm,armv8m-systick";
			reg = < 0xe000e010 0x10 >;
		};
	};
	chosen {
		zephyr,sram = &sram0;
		zephyr,flash = &flash0;
		zephyr,code-partition = &slot0_partition;
		zephyr,console = &flexcomm0;
		zephyr,shell-uart = &flexcomm0;
		zephyr,entropy = &rng;
		zephyr,flash-controller = &iap;
		zephyr,canbus = &can0;
	};
	aliases {
		led0 = &blue_led;
		led1 = &red_led;
		led2 = &green_led;
		sw0 = &btn_wk;
		sw1 = &btn_usr;
		sw2 = &btn_isp;
		usart-0 = &flexcomm0;
		spi-8 = &hs_lspi;
		lora0 = &lora_semtech_sx1261;
	};
	cpus {
		#address-cells = < 0x1 >;
		#size-cells = < 0x0 >;
		cpu@0 {
			compatible = "arm,cortex-m33f";
			reg = < 0x0 >;
			#address-cells = < 0x1 >;
			#size-cells = < 0x1 >;
			mpu: mpu@e000ed90 {
				compatible = "arm,armv8m-mpu";
				reg = < 0xe000ed90 0x40 >;
			};
		};
	};
	leds {
		compatible = "gpio-leds";
		blue_led: led_0 {
			gpios = < &gpio0 0x16 0x0 >;
			label = "Blue LED";
		};
		red_led: led_1 {
			gpios = < &gpio0 0x15 0x0 >;
			label = "Red LED";
		};
		green_led: led_2 {
			gpios = < &gpio0 0x12 0x0 >;
			label = "Green LED";
		};
	};
	gpio_keys {
		compatible = "gpio-keys";
		btn_wk: button_0 {
			label = "Wakeup button";
			gpios = < &gpio0 0x1c 0x1 >;
			zephyr,code = < 0x8f >;
		};
		btn_usr: button_1 {
			label = "User button";
			gpios = < &gpio1 0x9 0x1 >;
			zephyr,code = < 0xb >;
		};
		btn_isp: button_2 {
			label = "ISP button";
			gpios = < &gpio0 0x5 0x1 >;
			zephyr,code = < 0x2 >;
		};
	};
	mikrobus_header: mikrobus-connector {
		compatible = "mikro-bus";
		#gpio-cells = < 0x2 >;
		gpio-map-mask = < 0xffffffff 0xffffffc0 >;
		gpio-map-pass-thru = < 0x0 0x3f >;
		gpio-map = < 0x0 0x0 &gpio0 0x10 0x0 >, < 0x2 0x0 &gpio1 0x1 0x0 >, < 0x3 0x0 &gpio1 0x2 0x0 >, < 0x4 0x0 &gpio1 0x3 0x0 >, < 0x5 0x0 &gpio0 0x1a 0x0 >, < 0x6 0x0 &gpio1 0x5 0x0 >, < 0x7 0x0 &gpio0 0x1c 0x0 >, < 0x8 0x0 &gpio1 0xa 0x0 >, < 0x9 0x0 &gpio1 0xb 0x0 >, < 0xa 0x0 &gpio0 0x18 0x0 >, < 0xb 0x0 &gpio0 0x19 0x0 >;
	};
	arduino_header: arduino-connector {
		compatible = "arduino-header-r3";
		#gpio-cells = < 0x2 >;
		gpio-map-mask = < 0xffffffff 0xffffffc0 >;
		gpio-map-pass-thru = < 0x0 0x3f >;
		gpio-map = < 0x0 0x0 &gpio0 0x10 0x0 >, < 0x1 0x0 &gpio0 0x17 0x0 >, < 0x2 0x0 &gpio0 0x9 0x0 >, < 0x3 0x0 &gpio0 0x0 0x0 >, < 0x4 0x0 &gpio0 0xd 0x0 >, < 0x5 0x0 &gpio0 0xe 0x0 >, < 0x6 0x0 &gpio1 0xa 0x0 >, < 0x7 0x0 &gpio1 0xb 0x0 >, < 0x8 0x0 &gpio0 0xf 0x0 >, < 0x9 0x0 &gpio0 0x17 0x0 >, < 0xa 0x0 &gpio0 0x16 0x0 >, < 0xb 0x0 &gpio0 0x13 0x0 >, < 0xc 0x0 &gpio0 0x12 0x0 >, < 0xd 0x0 &gpio0 0x2 0x0 >, < 0xe 0x0 &gpio0 0xa 0x0 >, < 0xf 0x0 &gpio0 0x19 0x0 >, < 0x10 0x0 &gpio1 0x1 0x0 >, < 0x11 0x0 &gpio0 0x1a 0x0 >, < 0x12 0x0 &gpio1 0x3 0x0 >, < 0x13 0x0 &gpio1 0x2 0x0 >;
	};
};

include/zephyr/dt-bindings/inputmux/inputmux_trigger_ports.h

/*
 * Copyright 2023 NXP
 *
 * SPDX-License-Identifier: Apache-2.0
 */
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_INPUTMUX_TRIGGER_PORTS_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_INPUTMUX_TRIGGER_PORTS_H_

#define LPC55S69_DMA0_OTRIG_BASE 0x16000000
#define LPC55S69_DMA0_ITRIG_BASE 0x0E00000F
#define LPC55S69_DMA1_OTRIG_BASE 0x24000002
#define LPC55S69_DMA1_ITRIG_BASE 0x20000008

#define RT595_DMA0_OTRIG_BASE 0x30000000
#define RT595_DMA0_ITRIG_BASE 0x2000000E
#define RT595_DMA1_OTRIG_BASE 0x50000000
#define RT595_DMA1_ITRIG_BASE 0x4000000E

#define LPC55S36_DMA0_OTRIG_BASE 0x16000000
#define LPC55S36_DMA0_ITRIG_BASE 0x0E000011
#define LPC55S36_DMA1_OTRIG_BASE 0x24000002
#define LPC55S36_DMA1_ITRIG_BASE 0x20000008

#define LPC55S06_DMA0_OTRIG_BASE 0x16000000
#define LPC55S06_DMA0_ITRIG_BASE 0x0E00000F
#define LPC55S06_DMA1_OTRIG_BASE 0x24000002
#define LPC55S06_DMA1_ITRIG_BASE 0x20000008


#endif

Serial terminal output:

[00:00:00.000,000] <dbg> os: setup_thread_stack: stack 0x2000b7d0 for thread 0x2000a410: obj_s0
[00:00:00.000,000] <dbg> os: setup_thread_stack: stack 0x2000b690 for thread 0x2000a390: obj_size=320 buf_star0
[00:00:00.000,000] <dbg> os: setup_thread_stack: stack 0x2000ab90 for thread 0x200022c0: obj_size=768 buf_star0
[00:00:00.000,000] <dbg> os: setup_thread_stack: stack 0x2000bbd0 for thread 0x2000a530: obj_size=1024 buf_sta0
[00:00:00.000,000] <dbg> sx126x: sx126x_lora_init: Initializing sx126x
[00:00:00.000,000] <dbg> sx126x: SX126xReset: Resetting radio
[00:00:00.000,000] <dbg> os: z_tick_sleep: thread 0x2000a410 for 200 ticks
[00:00:00.020,000] <dbg> os: z_tick_sleep: thread 0x2000a410 for 100 ticks
[00:00:00.030,000] <dbg> sx126x: SX126xIoIrqInit: Configuring DIO IRQ callback
[00:00:00.030,000] <dbg> sx126x: SX126xWakeup: Sending GET_STATUS
[00:00:00.030,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: tx_bufs 0x2000bb30 - rx_bufs 0 - 1
[00:00:00.030,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: current_tx 0x2000bb28 (1), current_rx 00
[00:00:00.030,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.030,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.030,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.030,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.030,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.030,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.030,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.030,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.030,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0/0
[00:00:00.030,000] <dbg> sx126x: SX126xWakeup: Waiting for device...
[00:00:00.030,000] <dbg> sx126x: SX126xWakeup: Device ready
[00:00:00.030,000] <dbg> sx126x: SX126xWriteCommand: Issuing opcode 0x80 w. 1 bytes of data
[00:00:00.030,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: tx_bufs 0x2000bad0 - rx_bufs 0 - 1
[00:00:00.030,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: current_tx 0x2000bae0 (2), current_rx 00
[00:00:00.030,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.030,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.030,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.030,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.030,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.030,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.030,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.030,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.030,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0x2000bb37/1
[00:00:00.030,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.030,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.030,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.030,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.030,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.030,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.030,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.030,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.030,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0/0
[00:00:00.031,000] <dbg> sx126x: SX126xSetOperatingMode: SetOperatingMode: STDBY_RC (1)
[00:00:00.031,000] <dbg> sx126x: SX126xIoTcxoInit: No TCXO configured
[00:00:00.031,000] <dbg> sx126x: SX126xIoRfSwitchInit: Configuring DIO2
[00:00:00.031,000] <dbg> sx126x: SX126xWriteCommand: Issuing opcode 0x9d w. 1 bytes of data
[00:00:00.031,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: tx_bufs 0x2000bad0 - rx_bufs 0 - 1
[00:00:00.031,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: current_tx 0x2000bae0 (2), current_rx 00
[00:00:00.031,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.031,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.031,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.031,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.031,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.031,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.031,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.031,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.031,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0x2000bb37/1
[00:00:00.031,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.031,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.031,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.031,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.031,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.031,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.031,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.031,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.031,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0/0
[00:00:00.031,000] <dbg> sx126x: SX126xSetOperatingMode: SetOperatingMode: STDBY_RC (1)
[00:00:00.031,000] <dbg> sx126x: SX126xWriteCommand: Issuing opcode 0x80 w. 1 bytes of data
[00:00:00.031,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: tx_bufs 0x2000bad8 - rx_bufs 0 - 1
[00:00:00.031,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: current_tx 0x2000bae8 (2), current_rx 00
[00:00:00.031,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.031,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.031,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.031,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.031,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.031,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.031,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.031,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.031,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0x2000bb3f/1
[00:00:00.031,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.031,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.031,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.031,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.031,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.031,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.031,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.031,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.031,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0/0
[00:00:00.031,000] <dbg> sx126x: SX126xSetOperatingMode: SetOperatingMode: STDBY_RC (1)
[00:00:00.031,000] <dbg> sx126x: SX126xWriteCommand: Issuing opcode 0x96 w. 1 bytes of data
[00:00:00.031,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: tx_bufs 0x2000bad8 - rx_bufs 0 - 1
[00:00:00.031,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: current_tx 0x2000bae8 (2), current_rx 00
[00:00:00.031,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.031,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.031,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.031,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.031,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.031,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.032,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.032,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.032,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0x2000bb3f/1
[00:00:00.032,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.032,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.032,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.032,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.032,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.032,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.032,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.032,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.032,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0/0
[00:00:00.032,000] <dbg> sx126x: SX126xWriteCommand: Issuing opcode 0x8f w. 2 bytes of data
[00:00:00.032,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: tx_bufs 0x2000bad8 - rx_bufs 0 - 1
[00:00:00.032,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: current_tx 0x2000bae8 (2), current_rx 00
[00:00:00.032,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.032,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.032,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.032,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.032,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.032,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.032,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.032,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.032,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0x2000bb3c/2
[00:00:00.032,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.032,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.032,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.032,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.032,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.032,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.032,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.032,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.032,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0/0
[00:00:00.032,000] <dbg> sx126x: SX126xWriteCommand: Issuing opcode 0x95 w. 4 bytes of data
[00:00:00.032,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: tx_bufs 0x2000bac0 - rx_bufs 0 - 1
[00:00:00.032,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: current_tx 0x2000bad0 (2), current_rx 00
[00:00:00.032,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.032,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.032,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.032,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.032,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.032,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.032,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.032,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.032,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0x2000bb24/4
[00:00:00.032,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.032,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.032,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.032,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.032,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.032,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.032,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.032,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.032,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0/0
[00:00:00.032,000] <dbg> sx126x: SX126xWriteCommand: Issuing opcode 0x8e w. 2 bytes of data
[00:00:00.033,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: tx_bufs 0x2000bad0 - rx_bufs 0 - 1
[00:00:00.033,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: current_tx 0x2000bae0 (2), current_rx 00
[00:00:00.033,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.033,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.033,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.033,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.033,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.033,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.033,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.033,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.033,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0x2000bb34/2
[00:00:00.033,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.033,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.033,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.033,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.033,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.033,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.033,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.033,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.033,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0/0
[00:00:00.033,000] <dbg> sx126x: SX126xWriteCommand: Issuing opcode 0x8 w. 8 bytes of data
[00:00:00.033,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: tx_bufs 0x2000bad8 - rx_bufs 0 - 1
[00:00:00.033,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: current_tx 0x2000bae8 (2), current_rx 00
[00:00:00.033,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.033,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.033,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.033,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.033,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.033,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.033,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.033,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.033,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0x2000bb38/8
[00:00:00.033,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.033,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.033,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.033,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.033,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.033,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.033,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.033,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.033,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0/0
[00:00:00.033,000] <dbg> sx126x: SX126xReadRegisters: Reading 9 registers @ 0x29f
[00:00:00.033,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: tx_bufs 0x2000bab8 - rx_bufs 0x2000bac01
[00:00:00.033,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: current_tx 0x2000bac8 (2), current_rx 04
[00:00:00.033,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.033,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.033,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.033,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.033,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.033,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.033,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.033,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.033,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0/9
[00:00:00.033,000] <dbg> spi_mcux_flexcomm: spi_context_update_rx: rx buf/len 0x2000bb2c/9
[00:00:00.033,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.034,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.034,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.034,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.034,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.034,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.034,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.034,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.034,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0/0
[00:00:00.034,000] <dbg> spi_mcux_flexcomm: spi_context_update_rx: rx buf/len 0/0
[00:00:00.034,000] <dbg> sx126x: SX126xReadRegisters: register_value
                                 00 00 00 00 00 00 00 00  00                      |........ .       
[00:00:00.034,000] <dbg> sx126x: SX126xWriteRegisters: Writing 9 registers @ 0x29f: 0x1 , ...
[00:00:00.034,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: tx_bufs 0x2000bac0 - rx_bufs 0 - 1
[00:00:00.034,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: current_tx 0x2000bad0 (2), current_rx 00
[00:00:00.034,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.034,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.034,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.034,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.034,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.034,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.034,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.034,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.034,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0x2000bb2c/9
[00:00:00.034,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.034,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.034,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.034,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.034,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.034,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.034,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.034,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.034,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0/0
[00:00:00.034,000] <dbg> sx126x: SX126xReadRegisters: Reading 9 registers @ 0x29f
[00:00:00.034,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: tx_bufs 0x2000bab8 - rx_bufs 0x2000bac01
[00:00:00.034,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: current_tx 0x2000bac8 (2), current_rx 04
[00:00:00.034,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.034,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.034,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.034,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.034,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.034,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.034,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.034,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.034,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0/9
[00:00:00.034,000] <dbg> spi_mcux_flexcomm: spi_context_update_rx: rx buf/len 0x2000bb2c/9
[00:00:00.034,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.034,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.034,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.034,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.034,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.034,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.034,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.034,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.034,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0/0
[00:00:00.034,000] <dbg> spi_mcux_flexcomm: spi_context_update_rx: rx buf/len 0/0
[00:00:00.035,000] <dbg> sx126x: SX126xReadRegisters: register_value
                                 00 00 00 00 00 00 00 00  00                      |........ .       
[00:00:00.035,000] <dbg> sx126x: SX126xWriteRegisters: Writing 9 registers @ 0x29f: 0x1 , ...
[00:00:00.035,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: tx_bufs 0x2000bac0 - rx_bufs 0 - 1
[00:00:00.035,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: current_tx 0x2000bad0 (2), current_rx 00
[00:00:00.035,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.035,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.035,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.035,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.035,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.035,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.035,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.035,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.035,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0x2000bb2c/9
[00:00:00.035,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.035,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.035,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.035,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.035,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.035,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.035,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.035,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.035,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0/0
[00:00:00.035,000] <dbg> sx126x: SX126xAntSwOff: Disabling antenna switch
[00:00:00.035,000] <dbg> sx126x: SX126xWriteCommand: Issuing opcode 0x84 w. 1 bytes of data
[00:00:00.035,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: tx_bufs 0x2000bad8 - rx_bufs 0 - 1
[00:00:00.035,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: current_tx 0x2000bae8 (2), current_rx 00
[00:00:00.035,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.035,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.035,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.035,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.035,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.035,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.035,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.035,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.035,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0x2000bb3f/1
[00:00:00.035,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.035,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.035,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.035,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.035,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.035,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.035,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.035,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.035,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0/0
[00:00:00.035,000] <dbg> sx126x: SX126xSetOperatingMode: SetOperatingMode: SLEEP (0)
[00:00:00.035,000] <dbg> os: z_tick_sleep: thread 0x2000a410 for 20 ticks
*** Booting Zephyr OS build v3.6.0-3398-g55c8a1650235 ***
[00:00:00.037,000] <dbg> os: k_sched_unlock: scheduler unlocked (0x2000a410:0)
[00:00:00.037,000] <dbg> sx126x: SX126xWriteCommand: Issuing opcode 0x98 w. 2 bytes of data
[00:00:00.037,000] <dbg> sx126x: SX126xWakeup: Sending GET_STATUS
[00:00:00.038,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: tx_bufs 0x2000ba88 - rx_bufs 0 - 1
[00:00:00.038,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: current_tx 0x2000ba80 (1), current_rx 00
[00:00:00.038,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.038,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.038,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.038,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.038,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.038,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.038,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.038,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.038,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0/0
[00:00:00.038,000] <dbg> sx126x: SX126xWakeup: Waiting for device...
[00:00:00.038,000] <dbg> sx126x: SX126xWakeup: Device ready
[00:00:00.038,000] <dbg> sx126x: SX126xAntSwOn: Enabling antenna switch
[00:00:00.038,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: tx_bufs 0x2000baa0 - rx_bufs 0 - 1
[00:00:00.038,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: current_tx 0x2000bab0 (2), current_rx 00
[00:00:00.038,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.038,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.038,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.038,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.038,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.038,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.038,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.038,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.038,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0x2000bb04/2
[00:00:00.038,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.038,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.038,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.038,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.038,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.038,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.038,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.038,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.038,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0/0
[00:00:00.038,000] <dbg> sx126x: SX126xWriteCommand: Issuing opcode 0x86 w. 4 bytes of data
[00:00:00.038,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: tx_bufs 0x2000bab0 - rx_bufs 0 - 1
[00:00:00.038,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: current_tx 0x2000bac0 (2), current_rx 00
[00:00:00.038,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.038,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.038,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.038,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.038,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.038,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.038,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.038,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.038,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0x2000bb14/4
[00:00:00.038,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.038,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.038,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.038,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.038,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.038,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.038,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.038,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.038,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0/0
[00:00:00.039,000] <dbg> sx126x: SX126xWriteCommand: Issuing opcode 0x80 w. 1 bytes of data
[00:00:00.039,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: tx_bufs 0x2000ba88 - rx_bufs 0 - 1
[00:00:00.039,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: current_tx 0x2000ba98 (2), current_rx 00
[00:00:00.039,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.039,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.039,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.039,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.039,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.039,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.039,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.039,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.039,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0x2000baef/1
[00:00:00.039,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.039,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.039,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.039,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.039,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.039,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.039,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.039,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.039,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0/0
[00:00:00.039,000] <dbg> sx126x: SX126xSetOperatingMode: SetOperatingMode: STDBY_RC (1)
[00:00:00.039,000] <dbg> sx126x: SX126xWriteCommand: Issuing opcode 0x8a w. 1 bytes of data
[00:00:00.039,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: tx_bufs 0x2000ba80 - rx_bufs 0 - 1
[00:00:00.039,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: current_tx 0x2000ba90 (2), current_rx 00
[00:00:00.039,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.039,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.039,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.039,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.039,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.039,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.039,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.039,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.039,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0x2000bae7/1
[00:00:00.039,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.039,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.039,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.039,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.039,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.039,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.039,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.039,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.039,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0/0
[00:00:00.039,000] <dbg> sx126x: SX126xWriteCommand: Issuing opcode 0x8b w. 4 bytes of data
[00:00:00.039,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: tx_bufs 0x2000ba88 - rx_bufs 0 - 1
[00:00:00.039,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: current_tx 0x2000ba98 (2), current_rx 00
[00:00:00.039,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.039,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.039,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.039,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.039,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.039,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.039,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.039,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.039,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0x2000bae8/4
[00:00:00.039,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.040,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.040,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.040,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.040,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.040,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.040,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.040,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.040,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0/0
[00:00:00.040,000] <dbg> sx126x: SX126xWriteCommand: Issuing opcode 0x8c w. 6 bytes of data
[00:00:00.040,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: tx_bufs 0x2000ba80 - rx_bufs 0 - 1
[00:00:00.040,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: current_tx 0x2000ba90 (2), current_rx 00
[00:00:00.040,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.040,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.040,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.040,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.040,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.040,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.040,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.040,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.040,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0x2000bae4/6
[00:00:00.040,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.040,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.040,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.040,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.040,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.040,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.040,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.040,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.040,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0/0
[00:00:00.040,000] <dbg> sx126x: SX126xReadRegisters: Reading 1 registers @ 0x889
[00:00:00.040,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: tx_bufs 0x2000ba78 - rx_bufs 0x2000ba801
[00:00:00.040,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: current_tx 0x2000ba88 (2), current_rx 04
[00:00:00.040,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.040,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.040,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.040,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.040,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.040,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.040,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.040,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.040,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0/1
[00:00:00.040,000] <dbg> spi_mcux_flexcomm: spi_context_update_rx: rx buf/len 0x2000baef/1
[00:00:00.040,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.040,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.040,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.040,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.040,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.040,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.040,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.040,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.040,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0/0
[00:00:00.040,000] <dbg> spi_mcux_flexcomm: spi_context_update_rx: rx buf/len 0/0
[00:00:00.040,000] <dbg> sx126x: SX126xReadRegisters: register_value
                                 00                                               |.                
[00:00:00.040,000] <dbg> sx126x: SX126xWriteRegisters: Writing 1 registers @ 0x889: 0x4 , ...
[00:00:00.040,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: tx_bufs 0x2000ba80 - rx_bufs 0 - 1
[00:00:00.041,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: current_tx 0x2000ba90 (2), current_rx 00
[00:00:00.041,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.041,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.041,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.041,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.041,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.041,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.041,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.041,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.041,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0x2000baef/1
[00:00:00.041,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.041,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.041,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.041,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.041,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.041,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.041,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.041,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.041,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0/0
[00:00:00.041,000] <dbg> sx126x: SX126xSetRfTxPower: power: 4
[00:00:00.041,000] <dbg> sx126x: SX126xWriteCommand: Issuing opcode 0x95 w. 4 bytes of data
[00:00:00.041,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: tx_bufs 0x2000ba70 - rx_bufs 0 - 1
[00:00:00.041,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: current_tx 0x2000ba80 (2), current_rx 00
[00:00:00.041,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.041,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.041,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.041,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.041,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.041,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.041,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.041,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.041,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0x2000bad4/4
[00:00:00.041,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.041,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.041,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.041,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.041,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.041,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.041,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.041,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.041,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0/0
[00:00:00.041,000] <dbg> sx126x: SX126xWriteCommand: Issuing opcode 0x8e w. 2 bytes of data
[00:00:00.041,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: tx_bufs 0x2000ba80 - rx_bufs 0 - 1
[00:00:00.041,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: current_tx 0x2000ba90 (2), current_rx 00
[00:00:00.041,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.041,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.041,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.041,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.041,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.041,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.041,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.041,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.041,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0x2000bae4/2
[00:00:00.041,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.041,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.041,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.042,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.042,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.042,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.042,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.042,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.042,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0/0
[00:00:00.042,000] <dbg> sx126x: SX126xWriteCommand: Issuing opcode 0x8a w. 1 bytes of data
[00:00:00.042,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: tx_bufs 0x2000baa8 - rx_bufs 0 - 1
[00:00:00.042,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: current_tx 0x2000bab8 (2), current_rx 00
[00:00:00.042,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.042,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.042,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.042,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.042,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.042,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.042,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.042,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.042,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0x2000bb0f/1
[00:00:00.042,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.042,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.042,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.042,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.042,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.042,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.042,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.042,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.042,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0/0
[00:00:00.042,000] <dbg> sx126x: SX126xWriteRegisters: Writing 1 registers @ 0x740: 0x14 , ...
[00:00:00.042,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: tx_bufs 0x2000baa8 - rx_bufs 0 - 1
[00:00:00.042,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: current_tx 0x2000bab8 (2), current_rx 00
[00:00:00.042,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.042,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.042,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.042,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.042,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.042,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.042,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.042,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.042,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0x2000bb17/1
[00:00:00.042,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.042,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.042,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.042,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.042,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.042,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.042,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.042,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.042,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0/0
[00:00:00.042,000] <dbg> sx126x: SX126xWriteRegisters: Writing 1 registers @ 0x741: 0x24 , ...
[00:00:00.042,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: tx_bufs 0x2000bab0 - rx_bufs 0 - 1
[00:00:00.042,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: current_tx 0x2000bac0 (2), current_rx 00
[00:00:00.042,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.042,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.042,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.042,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.042,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.043,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.043,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.043,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.043,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0x2000bb1f/1
[00:00:00.043,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.043,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.043,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.043,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.043,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.043,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.043,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.043,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.043,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0/0
[00:00:00.043,000] <dbg> sx126x: SX126xAntSwOff: Disabling antenna switch
[00:00:00.043,000] <dbg> sx126x: SX126xWriteCommand: Issuing opcode 0x84 w. 1 bytes of data
[00:00:00.043,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: tx_bufs 0x2000baa8 - rx_bufs 0 - 1
[00:00:00.043,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: current_tx 0x2000bab8 (2), current_rx 00
[00:00:00.043,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.043,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.043,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.043,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.043,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.043,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.043,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.043,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.043,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0x2000bb0f/1
[00:00:00.043,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.043,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.043,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.043,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.043,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.043,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.043,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.043,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.043,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0/0
[00:00:00.043,000] <dbg> sx126x: SX126xSetOperatingMode: SetOperatingMode: SLEEP (0)
[00:00:00.043,000] <dbg> os: z_tick_sleep: thread 0x2000a410 for 20 ticks
[00:00:00.045,000] <dbg> sx126x: SX126xWriteCommand: Issuing opcode 0x8c w. 6 bytes of data
[00:00:00.045,000] <dbg> sx126x: SX126xWakeup: Sending GET_STATUS
[00:00:00.045,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: tx_bufs 0x2000ba70 - rx_bufs 0 - 1
[00:00:00.045,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: current_tx 0x2000ba68 (1), current_rx 00
[00:00:00.045,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.045,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.045,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.045,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.045,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.045,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.045,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.045,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.045,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0/0
[00:00:00.045,000] <dbg> sx126x: SX126xWakeup: Waiting for device...
[00:00:00.045,000] <dbg> sx126x: SX126xWakeup: Device ready
[00:00:00.045,000] <dbg> sx126x: SX126xAntSwOn: Enabling antenna switch
[00:00:00.046,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: tx_bufs 0x2000ba88 - rx_bufs 0 - 1
[00:00:00.046,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: current_tx 0x2000ba98 (2), current_rx 00
[00:00:00.046,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.046,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.046,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.046,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.046,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.046,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.046,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.046,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.046,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0x2000baec/6
[00:00:00.046,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.046,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.046,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.046,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.046,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.046,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.046,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.046,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.046,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0/0
[00:00:00.046,000] <dbg> sx126x: SX126xWriteCommand: Issuing opcode 0x8 w. 8 bytes of data
[00:00:00.046,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: tx_bufs 0x2000ba80 - rx_bufs 0 - 1
[00:00:00.046,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: current_tx 0x2000ba90 (2), current_rx 00
[00:00:00.046,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.046,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.046,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.046,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.046,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.046,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.046,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.046,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.046,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0x2000bae0/8
[00:00:00.046,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.046,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.046,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.046,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.046,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.046,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.046,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.046,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.046,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0/0
[00:00:00.046,000] <dbg> sx126x: SX126xWriteCommand: Issuing opcode 0x8c w. 6 bytes of data
[00:00:00.046,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: tx_bufs 0x2000ba78 - rx_bufs 0 - 1
[00:00:00.046,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: current_tx 0x2000ba88 (2), current_rx 00
[00:00:00.046,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.046,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.046,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.046,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.046,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.046,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.046,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.046,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.046,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0x2000badc/6
[00:00:00.046,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.046,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.047,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.047,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.047,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.047,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.047,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.047,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.047,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0/0
[00:00:00.047,000] <dbg> sx126x: SX126xWriteBuffer: Writing buffers @ 0x0 (10 bytes)
[00:00:00.047,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: tx_bufs 0x2000ba88 - rx_bufs 0 - 1
[00:00:00.047,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: current_tx 0x2000ba98 (2), current_rx 00
[00:00:00.047,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.047,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.047,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.047,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.047,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.047,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.047,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.047,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.047,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0x200001cc/10
[00:00:00.047,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.047,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.047,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.047,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.047,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.047,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.047,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.047,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.047,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0/0
[00:00:00.047,000] <dbg> sx126x: SX126xSetOperatingMode: SetOperatingMode: TX (4)
[00:00:00.047,000] <dbg> sx126x: SX126xWriteCommand: Issuing opcode 0x83 w. 3 bytes of data
[00:00:00.047,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: tx_bufs 0x2000ba80 - rx_bufs 0 - 1
[00:00:00.047,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: current_tx 0x2000ba90 (2), current_rx 00
[00:00:00.047,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.047,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.047,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.047,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.047,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.047,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.047,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.047,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.047,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0x2000bae4/3
[00:00:00.047,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.047,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.047,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.047,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.047,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.047,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.047,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.047,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.047,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0/0
[00:00:00.047,000] <dbg> sx12xx_common: sx12xx_lora_send: Expected air time of 10 bytes = 289ms
[00:00:00.626,000] <err> sx12xx_common: Packet transmission failed!
[00:00:00.626,000] <dbg> sx126x: SX126xAntSwOff: Disabling antenna switch
[00:00:00.626,000] <dbg> sx126x: SX126xWriteCommand: Issuing opcode 0x84 w. 1 bytes of data
[00:00:00.626,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: tx_bufs 0x2000ba90 - rx_bufs 0 - 1
[00:00:00.626,000] <dbg> spi_mcux_flexcomm: spi_context_buffers_setup: current_tx 0x2000baa0 (2), current_rx 00
[00:00:00.626,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.626,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.626,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.626,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.626,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.626,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.626,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.626,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.626,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0x2000baf7/1
[00:00:00.626,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 2
[00:00:00.626,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 2
[00:00:00.626,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.626,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.626,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: channel is 3
[00:00:00.626,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_configure: INSTALL call back on channel 3
[00:00:00.626,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: START TRANSFER
[00:00:00.626,000] <dbg> dma_mcux_lpc: dma_mcux_lpc_start: DMA CTRL 0x1
[00:00:00.626,000] <dbg> spi_mcux_flexcomm: spi_context_update_tx: tx buf/len 0/0
[00:00:00.626,000] <dbg> sx126x: SX126xSetOperatingMode: SetOperatingMode: SLEEP (0)
[00:00:00.626,000] <dbg> os: z_tick_sleep: thread 0x2000a410 for 20 ticks
[00:00:00.628,000] <err> lora_send: LoRa send failed

[elfarolab]

Hello,

I discovered the can bus use the same SPI bus of the Arduino header on the lpcxpresso55s06 board. Also the JP9 has to be installed to isolate the SPI signals coming from the ISP companion MCU.

The sample finnaly works onto the target board and MCU.

Thank you and sorry for the noise.

F.