Skip to content

[RFC] Add hal_gigadevice to support GigaDevice SoC Vendor #38727

@nandojve

Description

@nandojve

Origin

All source can be directly download from GigaDevice GD32 MCU support web site at download section.
gd32f403 firmware library
gd32e10x firmware library
gd32vf103 firmware library

Purpose

SoC Initialization code, register definitions and peripheral drivers. The peripheral drivers shares a common API between SoC series.

Mode of integration

The mode of integration is as Hardware Abstraction Layer module. The name suggested is hal_gigadevice and proposed with following layout:

├── CMakeLists.txt
├── GD32F403
│   ├── CMakeLists.txt
│   ├── CMSIS
│   │   └── GD
│   │       └── GD32F403
│   │           ├── Include
│   │           │   ├── gd32f403.h
│   │           │   └── system_gd32f403.h
│   │           └── Source
│   │               └── system_gd32f403.c
│   ├── README.h
│   └── standard_peripheral
│       ├── Include
│       │   ├── gd32f403_adc.h
│       │   ├── ...
│       │   └── gd32f403_wwdgt.h
│       └── Source
│           ├── gd32f403_adc.c
│           ├── ...
│           └── gd32f403_wwdgt.c
├── GD32VF103
│   ├── CMakeLists.txt
│   ├── README.h
│   ├── RISCV
│   │   └── ...
│   └── standard_peripheral
│       ├── gd32vf103.h
│       ├── Include
│       │   ├── gd32vf103_adc.h
│       │   ├── ...
│       │   └── gd32vf103_wwdgt.h
│       ├── Source
│       │   ├── gd32vf103_adc.c
│       │   ├── ...
│       │   └── gd32vf103_wwdgt.c
│       ├── system_gd32vf103.c
│       └── system_gd32vf103.h
└── zephyr
    └── module.yml

Pull Request

The initial version is proposed at #38658.

Description

The GigaDevice firmware library is composed by four parts: examples, firmware, template and utilities. This RFC propose to add only parts inside firmware directory.

The firmware directory have another three sub folders: CMSIS/RISCV, the soc standard peripheral and USB library. Initially, only first two should be integrated and the USB library later.

At CMSIS/RISCV the vendor implements specific code for initialization the SoC IP (ARM/NUCLEI). The standard peripheral is composed by two directories: an include directory, which defines peripheral registers and a source directory with a low level peripheral driver. This low level driver shares an API that allow a Zephyr Driver be shared between the different SoC series.

The goal is enable a single Zephyr driver be supported between same SoC IPs (Cortex-M3/4/33) or even different SoC IPs like Cortex-M and RISC-V by vendor standard peripheral API.

Dependencies

NA

Revision

https://github.com/nandojve/hal_gigadevice
26d50298ecf9b0daceacab9155dfd48bcbcba896

License

BSD-3-Clause

Metadata

Metadata

Assignees

No one assigned

    Labels

    RFCRequest For Comments: want input from the communityTSCTopics that need TSC discussionplatform: GD32GigaDevice

    Type

    Projects

    No projects

    Milestone

    Relationships

    None yet

    Development

    No branches or pull requests

    Issue actions