drivers: i2c: sam0: multiple edge case failures

[bryan-hunt]

Describe the bug

• Per device datasheets the bus state will be unknown until a transition on SDA is detected or the bus state is set to idle by software
• Smart mode causes a bus read every time the data register is read - this causes an additional read to be issued after the NACK is set by the host and the stop is never properly issued because the NACK flag is reset by the time the driver attempts to send the stop - this causes issues with some devices.
• The PR drivers: i2c: sam0: Continue write/read if next message allows it #38482 causes the host to NACK every byte read from a device if data->num_msgs == 1

Impact
I2C driver for many devices does not function properly

[rustypig91]

Could you check if #38881 fixes the last issue?

[bryan-hunt]

Not really - repeated starts for reads are also not being issued due to the fact that the logic for that is in the transfer function (rewrite the address register) and not the ISR. The solution is to a) revert most of the changes made or b) move most all logic to the ISR. The later is generally considered undesirable in favor of smaller/tighter ISRs. The question is which ends up being more performant - handing off to the transfer function might induce too much of a delay (bus idle duration) for a continued transfer.

I'm just solving everything since I have devices and a logic analyzer to work with.

[rustypig91]

When testing repeated restarts are you using the I2C_MSG_RESTART flag? Although I don't have the same setup of testing tools this works for me.

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